Michael Niewöhner uploaded patch set #3 to this change.

View Change

mb/clevo/l140cu: drop disabled SPD indices

Drop the disabled SPD indices from memcfg, since they're already
initialized to 0.

Change-Id: I6d88bdac17222c2c5c35439517fe0bea46744b2b
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
---
M src/mainboard/clevo/cml-u/variants/l140cu/romstage.c
1 file changed, 0 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/46248/3

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I6d88bdac17222c2c5c35439517fe0bea46744b2b
Gerrit-Change-Number: 46248
Gerrit-PatchSet: 3
Gerrit-Owner: Michael Niewöhner <foss@mniewoehner.de>
Gerrit-Reviewer: Felix Singer <felixsinger@posteo.net>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: newpatchset