Raul Rangel has uploaded this change for review.
mb/google/guybrush: Populate PIC IRQ data
The PIC IRQs are required so we can correctly setup the PCI_INT
registers.
BUG=b:184766519
TEST=Boot guybrush with `pci=nomsi,noacpi amd_iommu=off noapic` and
verify xhci and graphics continue to work.
$ cat /proc/interrupts
12: 285064 XT-PIC nvme0q0, nvme0q1, rtw88_pci
13: 100000 XT-PIC xhci-hcd:usb1
14: 4032 XT-PIC amdgpu, xhci-hcd:usb3
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I1d66ccd08a86a64242dbc909c57ff9685828f61f
---
M src/mainboard/google/guybrush/mainboard.c
1 file changed, 8 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/52915/1
diff --git a/src/mainboard/google/guybrush/mainboard.c b/src/mainboard/google/guybrush/mainboard.c
index b406bf3..1fe0af4 100644
--- a/src/mainboard/google/guybrush/mainboard.c
+++ b/src/mainboard/google/guybrush/mainboard.c
@@ -47,14 +47,14 @@
uint8_t pic_irq_num;
uint8_t apic_irq_num;
} guybrush_fch[] = {
- { PIRQ_A, PIRQ_NC, PIRQ_NC },
- { PIRQ_B, PIRQ_NC, PIRQ_NC },
- { PIRQ_C, PIRQ_NC, PIRQ_NC },
- { PIRQ_D, PIRQ_NC, PIRQ_NC },
- { PIRQ_E, PIRQ_NC, PIRQ_NC },
- { PIRQ_F, PIRQ_NC, PIRQ_NC },
- { PIRQ_G, PIRQ_NC, PIRQ_NC },
- { PIRQ_H, PIRQ_NC, PIRQ_NC },
+ { PIRQ_A, 12, PIRQ_NC },
+ { PIRQ_B, 13, PIRQ_NC },
+ { PIRQ_C, 14, PIRQ_NC },
+ { PIRQ_D, 15, PIRQ_NC },
+ { PIRQ_E, 12, PIRQ_NC },
+ { PIRQ_F, 13, PIRQ_NC },
+ { PIRQ_G, 14, PIRQ_NC },
+ { PIRQ_H, 15, PIRQ_NC },
{ PIRQ_SCI, ACPI_SCI_IRQ, ACPI_SCI_IRQ },
{ PIRQ_SD, PIRQ_NC, PIRQ_NC },
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