Arthur Heymans has uploaded this change for review.

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soc/intel/fsp-car: Clear the whole usable CAR region

Other symbols in car.ld likely expect to be zero initialized.

Change-Id: I44a0d3947eb6dd67dfd2d7f03e5c0766b043f61b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
1 file changed, 6 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/37277/1

diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
index 091fc4a..ec43311 100644
--- a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
+++ b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
@@ -89,13 +89,14 @@
 	/* Setup bootblock stack */
 	mov	%edx, %esp
 
-	/* clear .bss section as it is not shared */
+	/* coreboot assumes CAR region will be zero */
 	cld
-	xor	%eax, %eax
-	movl	$(_ebss), %ecx
-	movl	$(_bss), %edi
-	sub	%edi, %ecx
+	movl	%ecx, %edi
+	neg	%ecx
+	/* Clear up to Temp Ram top. */
+	add	%edx, %ecx
 	shrl	$2, %ecx
+	xorl	%eax, %eax
 	rep	stosl
 
 	/* Restore the timestamp from bootblock_crt0.S (ebp:mm1) */

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