Frans Hendriks has uploaded this change for review.
src/soc/intel/braswell/southcluster.c: Correct serail IRQ support
Serial IRQ was configured in quiet mode, but not enabled.
Enable serial IRQ when requested and make quiet mode configurable.
BUG=N/A
TEST=Intel CherryHill CRB
Change-Id: I7844cad69dc0563fa6109d779d0afb7c2edd7245
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
---
M src/soc/intel/braswell/Kconfig
M src/soc/intel/braswell/southcluster.c
2 files changed, 27 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/29398/1
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index 2ba7992..e8e4f14 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -127,4 +127,17 @@
string
default "soc/intel/braswell/bootblock/timestamp.inc"
+config ENABLE_SERIRQ
+ bool "Enable Serial IRQ"
+ default n
+ help
+ Enabled Serial IRQ
+
+config SERIRQ_CONTINUOUS_MODE
+ bool "Serial IRQ continuous mode"
+ default n
+ depends on ENABLE_SERIRQ
+ help
+ Enabled Serial IRQ continuous mode
+
endif
diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index dd0c78e..6e5ec63 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -77,6 +77,14 @@
#define LPC_DEFAULT_IO_RANGE_LOWER 0
#define LPC_DEFAULT_IO_RANGE_UPPER 0x1000
+static void sc_enable_serial_irqs(struct device *dev)
+{
+ u8 *ilb_base = (u8 *)(pci_read_config32(dev, IBASE) & ~0xF);
+
+ write32(ilb_base + ILB_OIC, read32(ilb_base + ILB_OIC) | SIRQEN);
+ write8(ilb_base + SCNT, read8(ilb_base + SCNT) | SCNT_MODE);
+}
+
static inline int io_range_in_default(int base, int size)
{
/* Does it start above the range? */
@@ -161,6 +169,9 @@
printk(BIOS_SPEW, "%s/%s (%s)\n",
__FILE__, __func__, dev_name(dev));
+ if (IS_ENABLED(CONFIG_ENABLE_SERIRQ))
+ sc_enable_serial_irqs(dev);
+
/* Set up the PIRQ PIC routing based on static config. */
for (i = 0; i < NUM_PIRQS; i++)
write8((void *)(pr_base + i*sizeof(ir->pic[i])),
@@ -493,7 +504,9 @@
write32(spi + LVSCC, cfg.lvscc | VCL);
}
spi_init();
- enable_serirq_quiet_mode();
+
+ if (IS_ENABLED(CONFIG_SERIRQ_CONTINUOUS_MODE))
+ enable_serirq_quiet_mode();
printk(BIOS_DEBUG, "Finalizing SMM.\n");
outb(APM_CNT_FINALIZE, APM_CNT);
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