Matt DeVillier uploaded patch set #2 to this change.

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mb/purism/librem_mini: Fix PCIe clock source mapping in devicetree

Correct PCIe clock source mapping in devicetree now that the GPIO
config has been fixed. Move ClkSrcUsage/ClkSrcClkReq registers
under their associated PCIe root ports.

Change-Id: Ibdaba51d971a39a6da6df82652b7420d7324dee5
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
---
M src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb
1 file changed, 6 insertions(+), 16 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/47221/2

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ibdaba51d971a39a6da6df82652b7420d7324dee5
Gerrit-Change-Number: 47221
Gerrit-PatchSet: 2
Gerrit-Owner: Matt DeVillier <matt.devillier@gmail.com>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Michael Niewöhner <foss@mniewoehner.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: newpatchset