Attention is currently required from: Selma Bensaid, Maulik V Vaghela, Sugnan Prabhu S, Rizwan Qureshi, Subrata Banik, Kane Chen.
Sridhar Siricilla uploaded patch set #3 to this change.
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mb/google/brya:[TEST] [PATCH 2/2] Enable PCIe ports 10, 11, 12
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I546bfc210ad7feaee91187b39f9c21402ec9d286
---
M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/52245/3
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I546bfc210ad7feaee91187b39f9c21402ec9d286
Gerrit-Change-Number: 52245
Gerrit-PatchSet: 3
Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla@intel.com>
Gerrit-Reviewer: Kane Chen <kane.chen@intel.com>
Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela@intel.com>
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