Christoph Pomaska has uploaded this change for review.

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mb/supermicro: Add X10SLM+-LN4F as X10SLM variant

This commit modifies the source tree of the X10SLM-F board to support
building a slightly different variant of the board, the X10SLM-LN4F.

Change-Id: I686d8d4e2ec5b4eb2db214b6e0827ac9c33829d1
Signed-off-by: Christoph Pomaska <c.pomaska@hosting.de>
---
D src/mainboard/supermicro/x10slm-f/Kconfig.name
D src/mainboard/supermicro/x10slm-f/board_info.txt
R src/mainboard/supermicro/x10slm/Kconfig
A src/mainboard/supermicro/x10slm/Kconfig.name
R src/mainboard/supermicro/x10slm/Makefile.inc
R src/mainboard/supermicro/x10slm/acpi/ec.asl
R src/mainboard/supermicro/x10slm/acpi/platform.asl
R src/mainboard/supermicro/x10slm/acpi/superio.asl
R src/mainboard/supermicro/x10slm/acpi_tables.c
A src/mainboard/supermicro/x10slm/board_info.txt
R src/mainboard/supermicro/x10slm/bootblock.c
R src/mainboard/supermicro/x10slm/cmos.default
R src/mainboard/supermicro/x10slm/cmos.layout
R src/mainboard/supermicro/x10slm/dsdt.asl
R src/mainboard/supermicro/x10slm/gpio.c
R src/mainboard/supermicro/x10slm/mainboard.c
R src/mainboard/supermicro/x10slm/romstage.c
R src/mainboard/supermicro/x10slm/variants/x10slm-f/devicetree.cb
R src/mainboard/supermicro/x10slm/variants/x10slm-f/hda_verb.c
A src/mainboard/supermicro/x10slm/variants/x10slm-ln4f/devicetree.cb
C src/mainboard/supermicro/x10slm/variants/x10slm-ln4f/hda_verb.c
21 files changed, 238 insertions(+), 78 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/35163/1
diff --git a/src/mainboard/supermicro/x10slm-f/Kconfig.name b/src/mainboard/supermicro/x10slm-f/Kconfig.name
deleted file mode 100644
index a1965a3..0000000
--- a/src/mainboard/supermicro/x10slm-f/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_SUPERMICRO_X10SLM_PLUS_F
- bool "X10SLM+-F"
diff --git a/src/mainboard/supermicro/x10slm-f/board_info.txt b/src/mainboard/supermicro/x10slm-f/board_info.txt
deleted file mode 100644
index e558429..0000000
--- a/src/mainboard/supermicro/x10slm-f/board_info.txt
+++ /dev/null
@@ -1,7 +0,0 @@
-Category: server
-Board URL: https://www.supermicro.com/products/motherboard/xeon/c220/x10slm_-f.cfm
-ROM package: SOIC-8
-ROM protocol: SPI
-ROM socketed: n
-Flashrom support: y
-Release year: 2013
diff --git a/src/mainboard/supermicro/x10slm-f/Kconfig b/src/mainboard/supermicro/x10slm/Kconfig
similarity index 60%
rename from src/mainboard/supermicro/x10slm-f/Kconfig
rename to src/mainboard/supermicro/x10slm/Kconfig
index 3945c09..99a3099 100644
--- a/src/mainboard/supermicro/x10slm-f/Kconfig
+++ b/src/mainboard/supermicro/x10slm/Kconfig
@@ -2,6 +2,7 @@
## This file is part of the coreboot project.
##
## Copyright (C) 2018 Tristan Corrick <tristan@corrick.kiwi>
+## Copyright (C) 2019 Hosting.de GmbH <c.pomaska@hosting.de>
##
## This program is free software: you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
@@ -14,13 +15,12 @@
## GNU General Public License for more details.
##

-if BOARD_SUPERMICRO_X10SLM_PLUS_F
+if BOARD_SUPERMICRO_X10SLM_PLUS_F || BOARD_SUPERMICRO_X10SLM_PLUS_LN4F

config BOARD_SPECIFIC_OPTIONS
def_bool y
select BOARD_ROMSIZE_KB_16384
select CPU_INTEL_HASWELL
- select DRIVERS_ASPEED_AST2050 # Supports AST2400 too.
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select HAVE_OPTION_TABLE
@@ -30,19 +30,33 @@
select SOUTHBRIDGE_INTEL_LYNXPOINT
select SUPERIO_NUVOTON_NCT6776
select SUPERIO_NUVOTON_NCT6776_COM_A
+ select DRIVERS_ASPEED_AST2050
+ select SUPERIO_ASPEED_AST2400 # The board's BMC
+ select MAINBOARD_HAS_LPC_TPM
+ select MAINBOARD_HAS_TPM2
+
+config MAINBOARD_DIR
+ string
+ default "supermicro/x10slm"
+
+config VARIANT_DIR
+ string
+ default "x10slm-f" if BOARD_SUPERMICRO_X10SLM_PLUS_F
+ default "x10slm-ln4f" if BOARD_SUPERMICRO_X10SLM_PLUS_LN4F
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "X10SLM+-F" if BOARD_SUPERMICRO_X10SLM_PLUS_F
+ default "X10SLM+-LN4F" if BOARD_SUPERMICRO_X10SLM_PLUS_LN4F
+
+config DEVICETREE
+ default "variants/x10slm-f/devicetree.cb" if BOARD_SUPERMICRO_X10SLM_PLUS_F
+ default "variants/x10slm-ln4f/devicetree.cb" if BOARD_SUPERMICRO_X10SLM_PLUS_LN4F

config CBFS_SIZE
hex
default 0xb00000

-config MAINBOARD_DIR
- string
- default "supermicro/x10slm-f"
-
-config MAINBOARD_PART_NUMBER
- string
- default "X10SLM+-F"
-
config MAX_CPUS
int
default 8
diff --git a/src/mainboard/supermicro/x10slm/Kconfig.name b/src/mainboard/supermicro/x10slm/Kconfig.name
new file mode 100644
index 0000000..6f95d97
--- /dev/null
+++ b/src/mainboard/supermicro/x10slm/Kconfig.name
@@ -0,0 +1,4 @@
+config BOARD_SUPERMICRO_X10SLM_PLUS_F
+ bool "X10SLM+-F"
+config BOARD_SUPERMICRO_X10SLM_PLUS_LN4F
+ bool "X10SLM+-LN4F"
diff --git a/src/mainboard/supermicro/x10slm-f/Makefile.inc b/src/mainboard/supermicro/x10slm/Makefile.inc
similarity index 100%
rename from src/mainboard/supermicro/x10slm-f/Makefile.inc
rename to src/mainboard/supermicro/x10slm/Makefile.inc
diff --git a/src/mainboard/supermicro/x10slm-f/acpi/ec.asl b/src/mainboard/supermicro/x10slm/acpi/ec.asl
similarity index 100%
rename from src/mainboard/supermicro/x10slm-f/acpi/ec.asl
rename to src/mainboard/supermicro/x10slm/acpi/ec.asl
diff --git a/src/mainboard/supermicro/x10slm-f/acpi/platform.asl b/src/mainboard/supermicro/x10slm/acpi/platform.asl
similarity index 100%
rename from src/mainboard/supermicro/x10slm-f/acpi/platform.asl
rename to src/mainboard/supermicro/x10slm/acpi/platform.asl
diff --git a/src/mainboard/supermicro/x10slm-f/acpi/superio.asl b/src/mainboard/supermicro/x10slm/acpi/superio.asl
similarity index 100%
rename from src/mainboard/supermicro/x10slm-f/acpi/superio.asl
rename to src/mainboard/supermicro/x10slm/acpi/superio.asl
diff --git a/src/mainboard/supermicro/x10slm-f/acpi_tables.c b/src/mainboard/supermicro/x10slm/acpi_tables.c
similarity index 100%
rename from src/mainboard/supermicro/x10slm-f/acpi_tables.c
rename to src/mainboard/supermicro/x10slm/acpi_tables.c
diff --git a/src/mainboard/supermicro/x10slm/board_info.txt b/src/mainboard/supermicro/x10slm/board_info.txt
new file mode 100644
index 0000000..741cfa3
--- /dev/null
+++ b/src/mainboard/supermicro/x10slm/board_info.txt
@@ -0,0 +1,9 @@
+Category: server
+Board URLs:
+X10SLM-F: https://www.supermicro.com/products/motherboard/xeon/c220/x10slm_-f.cfm
+X10SLM-LN4F: https://www.supermicro.com/en/products/motherboard/X10SLM+-LN4F
+ROM package: SOIC-8
+ROM protocol: SPI
+ROM socketed: n
+Flashrom support: y
+Release year: 2013
diff --git a/src/mainboard/supermicro/x10slm-f/bootblock.c b/src/mainboard/supermicro/x10slm/bootblock.c
similarity index 100%
rename from src/mainboard/supermicro/x10slm-f/bootblock.c
rename to src/mainboard/supermicro/x10slm/bootblock.c
diff --git a/src/mainboard/supermicro/x10slm-f/cmos.default b/src/mainboard/supermicro/x10slm/cmos.default
similarity index 100%
rename from src/mainboard/supermicro/x10slm-f/cmos.default
rename to src/mainboard/supermicro/x10slm/cmos.default
diff --git a/src/mainboard/supermicro/x10slm-f/cmos.layout b/src/mainboard/supermicro/x10slm/cmos.layout
similarity index 100%
rename from src/mainboard/supermicro/x10slm-f/cmos.layout
rename to src/mainboard/supermicro/x10slm/cmos.layout
diff --git a/src/mainboard/supermicro/x10slm-f/dsdt.asl b/src/mainboard/supermicro/x10slm/dsdt.asl
similarity index 100%
rename from src/mainboard/supermicro/x10slm-f/dsdt.asl
rename to src/mainboard/supermicro/x10slm/dsdt.asl
diff --git a/src/mainboard/supermicro/x10slm-f/gpio.c b/src/mainboard/supermicro/x10slm/gpio.c
similarity index 86%
rename from src/mainboard/supermicro/x10slm-f/gpio.c
rename to src/mainboard/supermicro/x10slm/gpio.c
index a1668f1..0ecdaca 100644
--- a/src/mainboard/supermicro/x10slm-f/gpio.c
+++ b/src/mainboard/supermicro/x10slm/gpio.c
@@ -87,16 +87,14 @@
.gpio28 = GPIO_LEVEL_HIGH,
};

-static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-};
+static const struct pch_gpio_set1 pch_gpio_set1_reset = {};

static const struct pch_gpio_set1 pch_gpio_set1_invert = {
.gpio3 = GPIO_INVERT,
.gpio14 = GPIO_INVERT,
};

-static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-};
+static const struct pch_gpio_set1 pch_gpio_set1_blink = {};

static const struct pch_gpio_set2 pch_gpio_set2_mode = {
.gpio32 = GPIO_MODE_GPIO,
@@ -156,8 +154,7 @@
.gpio54 = GPIO_LEVEL_HIGH,
};

-static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-};
+static const struct pch_gpio_set2 pch_gpio_set2_reset = {};

static const struct pch_gpio_set3 pch_gpio_set3_mode = {
.gpio64 = GPIO_MODE_GPIO,
@@ -188,28 +185,30 @@
.gpio73 = GPIO_LEVEL_LOW,
};

-static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-};
+static const struct pch_gpio_set3 pch_gpio_set3_reset = {};

const struct pch_gpio_map mainboard_gpio_map = {
- .set1 = {
- .mode = &pch_gpio_set1_mode,
- .direction = &pch_gpio_set1_direction,
- .level = &pch_gpio_set1_level,
- .blink = &pch_gpio_set1_blink,
- .invert = &pch_gpio_set1_invert,
- .reset = &pch_gpio_set1_reset,
- },
- .set2 = {
- .mode = &pch_gpio_set2_mode,
- .direction = &pch_gpio_set2_direction,
- .level = &pch_gpio_set2_level,
- .reset = &pch_gpio_set2_reset,
- },
- .set3 = {
- .mode = &pch_gpio_set3_mode,
- .direction = &pch_gpio_set3_direction,
- .level = &pch_gpio_set3_level,
- .reset = &pch_gpio_set3_reset,
- },
+ .set1 =
+ {
+ .mode = &pch_gpio_set1_mode,
+ .direction = &pch_gpio_set1_direction,
+ .level = &pch_gpio_set1_level,
+ .blink = &pch_gpio_set1_blink,
+ .invert = &pch_gpio_set1_invert,
+ .reset = &pch_gpio_set1_reset,
+ },
+ .set2 =
+ {
+ .mode = &pch_gpio_set2_mode,
+ .direction = &pch_gpio_set2_direction,
+ .level = &pch_gpio_set2_level,
+ .reset = &pch_gpio_set2_reset,
+ },
+ .set3 =
+ {
+ .mode = &pch_gpio_set3_mode,
+ .direction = &pch_gpio_set3_direction,
+ .level = &pch_gpio_set3_level,
+ .reset = &pch_gpio_set3_reset,
+ },
};
diff --git a/src/mainboard/supermicro/x10slm-f/mainboard.c b/src/mainboard/supermicro/x10slm/mainboard.c
similarity index 96%
rename from src/mainboard/supermicro/x10slm-f/mainboard.c
rename to src/mainboard/supermicro/x10slm/mainboard.c
index 4bd5d15..57b5cec 100644
--- a/src/mainboard/supermicro/x10slm-f/mainboard.c
+++ b/src/mainboard/supermicro/x10slm/mainboard.c
@@ -53,6 +53,5 @@
}

struct chip_operations mainboard_ops = {
- CHIP_NAME("X10SLM+-F")
- .enable_dev = mainboard_enable,
+ CHIP_NAME("X10SLM+-F").enable_dev = mainboard_enable,
};
diff --git a/src/mainboard/supermicro/x10slm-f/romstage.c b/src/mainboard/supermicro/x10slm/romstage.c
similarity index 70%
rename from src/mainboard/supermicro/x10slm-f/romstage.c
rename to src/mainboard/supermicro/x10slm/romstage.c
index 552ebd2..0ff9b69 100644
--- a/src/mainboard/supermicro/x10slm-f/romstage.c
+++ b/src/mainboard/supermicro/x10slm/romstage.c
@@ -16,7 +16,7 @@
*/

#include <cpu/intel/haswell/haswell.h>
-#include <arch/romstage.h>
+#include <cpu/intel/romstage.h>
#include <northbridge/intel/haswell/haswell.h>
#include <northbridge/intel/haswell/pei_data.h>
#include <southbridge/intel/common/gpio.h>
@@ -38,7 +38,7 @@
RCBA_END_CONFIG,
};

-void mainboard_romstage_entry(void)
+void mainboard_romstage_entry(unsigned long bist)
{
struct pei_data pei_data = {
.pei_version = PEI_VERSION,
@@ -56,42 +56,45 @@
.temp_mmio_base = 0xfed08000,
.system_type = 1, /* desktop/server */
.tseg_size = CONFIG_SMM_TSEG_SIZE,
- .spd_addresses = { 0xa0, 0xa2, 0xa4, 0xa6 },
+ .spd_addresses = {0xa0, 0xa2, 0xa4, 0xa6},
.ec_present = 0,
.ddr_refresh_2x = 1,
.max_ddr3_freq = 1600,
- .usb2_ports = {
- /* Length, Enable, OCn#, Location */
- { 0x0040, 1, 0, USB_PORT_INTERNAL },
- { 0x0040, 1, 0, USB_PORT_BACK_PANEL },
- { 0x0110, 1, 1, USB_PORT_BACK_PANEL },
- { 0x0110, 1, 1, USB_PORT_BACK_PANEL },
- { 0x0110, 1, 2, USB_PORT_BACK_PANEL },
- { 0x0110, 1, 2, USB_PORT_BACK_PANEL },
- { 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
- { 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
- { 0x0040, 1, 4, USB_PORT_BACK_PANEL },
- { 0x0040, 1, 4, USB_PORT_BACK_PANEL },
- { 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
- { 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
- { 0x0040, 1, 6, USB_PORT_BACK_PANEL },
- { 0x0040, 1, 6, USB_PORT_BACK_PANEL },
- },
- .usb3_ports = {
- /* Enable, OCn# */
- { 1, 1 },
- { 1, 1 },
- { 0, USB_OC_PIN_SKIP },
- { 0, USB_OC_PIN_SKIP },
- { 1, 3 },
- { 1, 3 },
- },
+ .usb2_ports =
+ {
+ /* Length, Enable, OCn#, Location */
+ {0x0040, 1, 0, USB_PORT_INTERNAL},
+ {0x0040, 1, 0, USB_PORT_BACK_PANEL},
+ {0x0110, 1, 1, USB_PORT_BACK_PANEL},
+ {0x0110, 1, 1, USB_PORT_BACK_PANEL},
+ {0x0110, 1, 2, USB_PORT_BACK_PANEL},
+ {0x0110, 1, 2, USB_PORT_BACK_PANEL},
+ {0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP},
+ {0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP},
+ {0x0040, 1, 4, USB_PORT_BACK_PANEL},
+ {0x0040, 1, 4, USB_PORT_BACK_PANEL},
+ {0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP},
+ {0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP},
+ {0x0040, 1, 6, USB_PORT_BACK_PANEL},
+ {0x0040, 1, 6, USB_PORT_BACK_PANEL},
+ },
+ .usb3_ports =
+ {
+ /* Enable, OCn# */
+ {1, 1},
+ {1, 1},
+ {0, USB_OC_PIN_SKIP},
+ {0, USB_OC_PIN_SKIP},
+ {1, 3},
+ {1, 3},
+ },
};

struct romstage_params romstage_params = {
.pei_data = &pei_data,
.gpio_map = &mainboard_gpio_map,
.rcba_config = rcba_config,
+ .bist = bist,
};

romstage_common(&romstage_params);
diff --git a/src/mainboard/supermicro/x10slm-f/devicetree.cb b/src/mainboard/supermicro/x10slm/variants/x10slm-f/devicetree.cb
similarity index 100%
rename from src/mainboard/supermicro/x10slm-f/devicetree.cb
rename to src/mainboard/supermicro/x10slm/variants/x10slm-f/devicetree.cb
diff --git a/src/mainboard/supermicro/x10slm-f/hda_verb.c b/src/mainboard/supermicro/x10slm/variants/x10slm-f/hda_verb.c
similarity index 100%
rename from src/mainboard/supermicro/x10slm-f/hda_verb.c
rename to src/mainboard/supermicro/x10slm/variants/x10slm-f/hda_verb.c
diff --git a/src/mainboard/supermicro/x10slm/variants/x10slm-ln4f/devicetree.cb b/src/mainboard/supermicro/x10slm/variants/x10slm-ln4f/devicetree.cb
new file mode 100644
index 0000000..5dce6b0
--- /dev/null
+++ b/src/mainboard/supermicro/x10slm/variants/x10slm-ln4f/devicetree.cb
@@ -0,0 +1,141 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2018 Tristan Corrick <tristan@corrick.kiwi>
+##
+## This program is free software: you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation, either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+chip northbridge/intel/haswell
+
+ device cpu_cluster 0 on
+ chip cpu/intel/haswell
+ register "c1_acpower" = "1"
+ register "c1_battery" = "1"
+ register "c2_acpower" = "3"
+ register "c2_battery" = "3"
+ register "c3_acpower" = "5"
+ register "c3_battery" = "5"
+
+ device lapic 0 on end
+ device lapic 0xacac off end
+ end
+ end
+
+ device domain 0 on
+ subsystemid 0x15d9 0x0803 inherit
+
+ device pci 00.0 on end # Host bridge
+ device pci 01.0 on end # PEG 10
+ device pci 01.1 on end # PEG 11
+ device pci 02.0 off end # IGD
+ device pci 03.0 off end # Mini-HD audio
+
+ chip southbridge/intel/lynxpoint
+ register "pirqa_routing" = "0x8b"
+ register "pirqb_routing" = "0x8a"
+ register "pirqc_routing" = "0x8b"
+ register "pirqd_routing" = "0x8a"
+ register "pirqe_routing" = "0x80"
+ register "pirqf_routing" = "0x80"
+ register "pirqg_routing" = "0x80"
+ register "pirqh_routing" = "0x85"
+
+ register "sata_ahci" = "1"
+ register "sata_port_map" = "0x3f"
+
+ register "gen1_dec" = "0x00000295" # Super I/O HWM
+
+ device pci 14.0 on end # xHCI controller
+ device pci 16.0 on end # Management Engine interface 1
+ device pci 16.1 on end # Management Engine interface 2
+ device pci 16.2 off end # Management Engine IDE-R
+ device pci 16.3 off end # Management Engine KT
+ device pci 19.0 off end # Intel Gigabit Ethernet
+ device pci 1a.0 on end # EHCI controller 2
+ device pci 1b.0 off end # HD audio controller
+ device pci 1c.0 on # PCIe root port 1
+ device pci 00.0 on # ASPEED PCI-to-PCI bridge
+ device pci 00.0 on end # VGA controller
+ end
+ end
+ device pci 1c.1 off end # PCIe root port 2
+ device pci 1c.2 on # PCIe root port 3
+ device pci 00.0 on # Intel I210 Gigabit Ethernet
+ subsystemid 0x15d9 0x1533
+ end
+ end
+ device pci 1c.3 on # PCIe root port 4
+ device pci 00.0 on # Intel I210 Gigabit Ethernet
+ subsystemid 0x15d9 0x1533
+ end
+ end
+ device pci 1c.4 on end # PCIe root port 5
+ device pci 1c.5 off end # PCIe root port 6
+ device pci 1c.6 on # PCIe root port 7
+ device pci 00.0 on # Intel I210 Gigabit Ethernet
+ subsystemid 0x15d9 0x1533
+ end
+ end
+ device pci 1c.7 on # PCIe root port 8
+ device pci 00.0 on # Intel I210 Gigabit Ethernet
+ subsystemid 0x15d9 0x1533
+ end
+ end
+ device pci 1d.0 on end # EHCI controller 1
+ device pci 1f.0 on # LPC bridge
+ chip superio/nuvoton/nct6776
+ device pnp 2e.0 off end # Floppy
+ device pnp 2e.1 off end # Parallel
+ device pnp 2e.2 on # UART A
+ io 0x60 = 0x03f8
+ irq 0x70 = 4
+ end
+ device pnp 2e.3 on # UART B
+ io 0x60 = 0x02f8
+ irq 0x70 = 3
+ end
+ device pnp 2e.5 off end # PS/2 KBC
+ device pnp 2e.6 off end # CIR
+ device pnp 2e.7 off end # GPIO8
+ device pnp 2e.107 off end # GPIO9
+ device pnp 2e.8 off end # WDT
+ device pnp 2e.108 off end # GPIO0
+ device pnp 2e.208 off end # GPIOA
+ device pnp 2e.308 off end # GPIO base
+ device pnp 2e.109 off end # GPIO1
+ device pnp 2e.209 off end # GPIO2
+ device pnp 2e.309 off end # GPIO3
+ device pnp 2e.409 off end # GPIO4
+ device pnp 2e.509 off end # GPIO5
+ device pnp 2e.609 off end # GPIO6
+ device pnp 2e.709 off end # GPIO7
+ device pnp 2e.a off end # ACPI
+ device pnp 2e.b on # HWM, LED
+ io 0x60 = 0x0290
+ io 0x62 = 0
+ irq 0x70 = 0
+ end
+ device pnp 2e.d off end # VID
+ device pnp 2e.e off end # CIR wake-up
+ device pnp 2e.f off end # GPIO PP/OD
+ device pnp 2e.14 off end # SVID
+ device pnp 2e.16 off end # Deep sleep
+ device pnp 2e.17 off end # GPIOA
+ end
+ end
+ device pci 1f.2 on end # SATA controller 1
+ device pci 1f.3 on end # SMBus
+ device pci 1f.5 off end # SATA controller 2
+ device pci 1f.6 on end # PCH thermal sensor
+ end
+ end
+end
diff --git a/src/mainboard/supermicro/x10slm-f/hda_verb.c b/src/mainboard/supermicro/x10slm/variants/x10slm-ln4f/hda_verb.c
similarity index 100%
copy from src/mainboard/supermicro/x10slm-f/hda_verb.c
copy to src/mainboard/supermicro/x10slm/variants/x10slm-ln4f/hda_verb.c

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I686d8d4e2ec5b4eb2db214b6e0827ac9c33829d1
Gerrit-Change-Number: 35163
Gerrit-PatchSet: 1
Gerrit-Owner: Christoph Pomaska <github@aufmachen.jetzt>
Gerrit-MessageType: newchange