The problem I see with this and the next patch (40963) is that it bases on the assumption that never more than one type of super i/o comfiguration enter/exit sequences can be linked in the pre-ram stages of a board. An example of a board where this assumption is not valid would be the Supermicro X10SLM+-F that only passes the build test after the two patches, because it only initializes the Nuvoton super I/O in bootblock/romstage and doesn't do anything with the ASpeed chip before ramstage.

I'd suggest adding functions in a common place with names like pnp_enter_conf_mode_55 that take pnp_devfn_t as dev parameter type instead of struct device *. Then just add the calls to the corresponding config mode enter or exit functions in the pre-ram-code.

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