Attention is currently required from: Jérémy Compostella.

Yu-Ping Wu has uploaded this change for review.

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drivers/pc80/rtc/mc146818rtc: Add assertion of bank selection for AMD

As described in CB:83495, in AMD platforms, the bit 4 of CMOS Register A
is bank selection. Since the MC146818 driver accesses VBNV via Bank 0,
the value set in cmos_init() must not contain that bit.

To prevent RTC_FREQ_SELECT_DEFAULT from being incorrectly modified, add
an static assertion about the bank selection for AMD. Note that the
kernel driver also ensures RTC_AMD_BANK_SELECT isn't set for AMD [1].

[1] lore.kernel.org/lkml/20220523165815.913462426@linuxfoundation.org

BUG=b:346716300
TEST=none
BRANCH=skyrim

Change-Id: I6122201914c40604f86dcca6025b55c595ef609e
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
---
M src/drivers/pc80/rtc/mc146818rtc.c
M src/include/pc80/mc146818rtc.h
2 files changed, 5 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/83537/1
diff --git a/src/drivers/pc80/rtc/mc146818rtc.c b/src/drivers/pc80/rtc/mc146818rtc.c
index 6474ecb..c44bfd3 100644
--- a/src/drivers/pc80/rtc/mc146818rtc.c
+++ b/src/drivers/pc80/rtc/mc146818rtc.c
@@ -65,6 +65,9 @@
#define RTC_CONTROL_DEFAULT (RTC_24H)
#define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ)

+_Static_assert(!CONFIG(SOC_AMD_COMMON) || !(RTC_FREQ_SELECT_AMD & RTC_AMD_BANK_SELECT),
+ "Bank 1 should not be selected for AMD");
+
static bool __cmos_init(bool invalid)
{
bool cmos_invalid;
diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h
index 7818421..701cc73 100644
--- a/src/include/pc80/mc146818rtc.h
+++ b/src/include/pc80/mc146818rtc.h
@@ -33,6 +33,8 @@
# define RTC_REF_CLCK_4MHZ 0x00
# define RTC_REF_CLCK_1MHZ 0x10
# define RTC_REF_CLCK_32KHZ 0x20
+ /* In AMD BKDG, bit 4 is DV0 bank selection. Bits 5 and 6 are reserved. */
+# define RTC_AMD_BANK_SELECT 0x10
/* 2 values for divider stage reset, others for "testing purposes only" */
# define RTC_DIV_RESET1 0x60
# define RTC_DIV_RESET2 0x70

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Gerrit-MessageType: newchange
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I6122201914c40604f86dcca6025b55c595ef609e
Gerrit-Change-Number: 83537
Gerrit-PatchSet: 1
Gerrit-Owner: Yu-Ping Wu <yupingso@google.com>
Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella@intel.com>
Gerrit-Attention: Jérémy Compostella <jeremy.compostella@intel.com>