Angel Pons has uploaded this change for review.

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cpu/intel/model_68x_6bx: Update ucode before enabling cache

Other similar CPUs update the microcode first, so do the same here.

Change-Id: I9dda712043e1d17c3cc860d38b5daf8adfa882fa
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/cpu/intel/model_68x_6bx/model_68x_6bx_init.c
1 file changed, 3 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/44238/1

diff --git a/src/cpu/intel/model_68x_6bx/model_68x_6bx_init.c b/src/cpu/intel/model_68x_6bx/model_68x_6bx_init.c
index dc23a7be..06ac099 100644
--- a/src/cpu/intel/model_68x_6bx/model_68x_6bx_init.c
+++ b/src/cpu/intel/model_68x_6bx/model_68x_6bx_init.c
@@ -13,12 +13,12 @@
 {
 	char processor_name[49];
 
-	/* Turn on caching if we haven't already */
-	x86_enable_cache();
-
 	/* Update the microcode */
 	intel_update_microcode_from_cbfs();
 
+	/* Turn on caching if we haven't already */
+	x86_enable_cache();
+
 	/* Print processor name */
 	fill_processor_name(processor_name);
 	printk(BIOS_INFO, "CPU: %s.\n", processor_name);

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