Jonathan Zhang has uploaded this change for review.

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soc/intel/xeon_sp/cpx: add CPUID for CPX-SP ES processor

Add CPUID for CPX-SP ES processor.

DeltaLake DVT server uses CPX-SP ES processor.

TESTED=booted DeltaLake DVT server to target OS.
[root@localhost ~]# dmidecode -t 1
Getting SMBIOS data from sysfs.
SMBIOS 3.0 present.

Handle 0x0001, DMI type 1, 27 bytes
System Information
	Manufacturer: Wiwynn
	Product Name: Delta Lake DVT
	Version: YoDL03
	Serial Number: BZA02200122N01A
	UUID: 000A0A22-2C29-1ED6-8259-000055DA2BFF
	Wake-up Type: Reserved
	SKU Number: Not Specified
	Family: DeltaLake

Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: Ic8975f6bf752fd685b38b2d1f0a4da41983b57f6
---
M src/soc/intel/xeon_sp/cpx/cpu.c
M src/soc/intel/xeon_sp/cpx/include/soc/cpu.h
2 files changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/44357/1

diff --git a/src/soc/intel/xeon_sp/cpx/cpu.c b/src/soc/intel/xeon_sp/cpx/cpu.c
index cf903b8..f485b72 100644
--- a/src/soc/intel/xeon_sp/cpx/cpu.c
+++ b/src/soc/intel/xeon_sp/cpx/cpu.c
@@ -100,6 +100,7 @@
 
 static const struct cpu_device_id cpu_table[] = {
 	{X86_VENDOR_INTEL, CPUID_COOPERLAKE_SP_A0},
+	{X86_VENDOR_INTEL, CPUID_COOPERLAKE_SP_ES},
 	{0, 0},
 };
 
diff --git a/src/soc/intel/xeon_sp/cpx/include/soc/cpu.h b/src/soc/intel/xeon_sp/cpx/include/soc/cpu.h
index 1458000..e1c0171 100644
--- a/src/soc/intel/xeon_sp/cpx/include/soc/cpu.h
+++ b/src/soc/intel/xeon_sp/cpx/include/soc/cpu.h
@@ -7,6 +7,7 @@
 #include <cpu/x86/msr.h>
 
 #define CPUID_COOPERLAKE_SP_A0			0x05065a
+#define CPUID_COOPERLAKE_SP_ES			0x05065b
 
 /* CPU bus clock is fixed at 100MHz */
 #define CPU_BCLK 100

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