Duncan Laurie has uploaded this change for review.
mb/gooogle/eve: Interrupt changes for audio devices
Use the new PAD_CFG_GPI_INT macro to specify the headset codec
interrupt as specifically edge triggered since it is registered
as EDGE_BOTH in order to prevent the interrupt from firing when
the system is resuming.
And change the DSP interrupt to edge triggered since the kernel
is registering with IRQF_TRIGGER_RISING in order to prevent an
interrupt storm when it asserts.
BUG=b:35582164
TEST=manual testing on Eve:
1) ensure the headset codec sends interrupt on insert and remove
2) ensure there is only one interrupt counted when DSP asserts irq
Change-Id: I40a8ee667de653e4e70770cd96b6417442c1b0ec
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
---
M src/mainboard/google/eve/devicetree.cb
M src/mainboard/google/eve/gpio.h
2 files changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/20433/1
diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb
index 81f235f..b6cb848 100644
--- a/src/mainboard/google/eve/devicetree.cb
+++ b/src/mainboard/google/eve/devicetree.cb
@@ -323,7 +323,7 @@
chip drivers/spi/acpi
register "hid" = "ACPI_DT_NAMESPACE_HID"
register "compat_string" = ""realtek,rt5514""
- register "irq" = "ACPI_IRQ_LEVEL_HIGH(GPP_F10_IRQ)"
+ register "irq" = "ACPI_IRQ_EDGE_HIGH(GPP_F10_IRQ)"
device spi 0 on end
end
end # GSPI #0
diff --git a/src/mainboard/google/eve/gpio.h b/src/mainboard/google/eve/gpio.h
index cd0fe1d..4818697 100644
--- a/src/mainboard/google/eve/gpio.h
+++ b/src/mainboard/google/eve/gpio.h
@@ -128,7 +128,7 @@
/* ISH_I2C0_SCL */ PAD_CFG_NC(GPP_D6),
/* ISH_I2C1_SDA */ PAD_CFG_NC(GPP_D7),
/* ISH_I2C1_SCL */ PAD_CFG_NC(GPP_D8),
-/* ISH_SPI_CS# */ PAD_CFG_GPI(GPP_D9, NONE, PLTRST), /* HP_IRQ_GPIO */
+/* ISH_SPI_CS# */ PAD_CFG_GPI_INT(GPP_D9, NONE, PLTRST), /* HP_IRQ_GPIO */
/* ISH_SPI_CLK */ PAD_CFG_GPO(GPP_D10, 1, DEEP), /* SPKR_RST_L */
/* ISH_SPI_MISO */ PAD_CFG_GPI_APIC(GPP_D11, NONE, PLTRST), /* SPKR_INT_L */
/* ISH_SPI_MOSI */ PAD_CFG_TERM_GPO(GPP_D12, 1, 20K_PU, DEEP), /* EN_PP3300_DX_CAM */
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