Attention is currently required from: Bora Guvendik, Karthik Ramasubramanian, Shelley Chen.
4 comments:
Patchset:
Oh also, is this a restriction that we need to adhere to for future devices (INT pin needs to be hig […]
yes, this patch is applicable for such case.
Thank you Ashish for debugging this issue! […]
We use find_free_unique_irq() to get available irqs to assign to pins, where it looks for pins available in a range upto available irq limit. This limit is set by set_ioapic_used(). In case of this: https://review.coreboot.org/c/coreboot/+/79886 the limit was available upto irq 45 instead of 44. Also, the set_ioapic_used() was only called for WAKE pins, hence added the flag PAD_CFG0_ROUTE_SWAPPED for cases where INT < WAKE case.
File src/soc/intel/common/block/gpio/gpio.c:
Patch Set #1, Line 292: !(cfg->pad_config[0] & PAD_CFG0_ROUTE_SWAPPED)
Why does polarity config applicable only for non-swapped IRQ pins?
Polarity is only applicable in case of wake pins, not interrupt pins.
Nit: Extraneous line
Acknowledged
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