Patrick Georgi submitted this change.

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Approvals: build bot (Jenkins): Verified Kyösti Mälkki: Looks good to me, approved Angel Pons: Looks good to me, approved
mb/*/{x201,ms2290}/mainboard.c: Remove superfluous ramstage code

Change-Id: I0270c50dea2a2ce6c8e6114ed708f06be9d33c0e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33141
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
M src/mainboard/lenovo/x201/mainboard.c
M src/mainboard/packardbell/ms2290/mainboard.c
2 files changed, 0 insertions(+), 30 deletions(-)

diff --git a/src/mainboard/lenovo/x201/mainboard.c b/src/mainboard/lenovo/x201/mainboard.c
index 96033f8..56c439b 100644
--- a/src/mainboard/lenovo/x201/mainboard.c
+++ b/src/mainboard/lenovo/x201/mainboard.c
@@ -35,23 +35,8 @@

static void mainboard_enable(struct device *dev)
{
- u16 pmbase;
-
dev->ops->acpi_fill_ssdt_generator = fill_ssdt;

- pmbase = pci_read_config32(pcidev_on_root(0x1f, 0),
- PMBASE) & 0xff80;
-
- printk(BIOS_SPEW, " ... pmbase = 0x%04x\n", pmbase);
-
- outl(0, pmbase + SMI_EN);
-
- enable_lapic();
- pci_write_config32(pcidev_on_root(0x1f, 0), GPIO_BASE,
- DEFAULT_GPIOBASE | 1);
- pci_write_config8(pcidev_on_root(0x1f, 0), GPIO_CNTL,
- 0x10);
-
/* If we're resuming from suspend, blink suspend LED */
if (acpi_is_wakeup_s3())
ec_write(0x0c, 0xc7);
diff --git a/src/mainboard/packardbell/ms2290/mainboard.c b/src/mainboard/packardbell/ms2290/mainboard.c
index 508488a..809ccea 100644
--- a/src/mainboard/packardbell/ms2290/mainboard.c
+++ b/src/mainboard/packardbell/ms2290/mainboard.c
@@ -32,8 +32,6 @@

static void mainboard_enable(struct device *dev)
{
- u16 pmbase;
-
int i;
const u8 dmp[256] = {
0x00, 0x20, 0x00, 0x00, 0x00, 0x02, 0x89, 0xe4, 0x30, 0x00, 0x40, 0x14, 0x00, 0x00, 0x00, 0x11,
@@ -57,19 +55,6 @@
for (i = 0; i < 256; i++)
ec_write (i, dmp[i]);

- pmbase = pci_read_config32(pcidev_on_root(0x1f, 0),
- PMBASE) & 0xff80;
-
- printk(BIOS_SPEW, " ... pmbase = 0x%04x\n", pmbase);
-
- outl(0, pmbase + SMI_EN);
-
- enable_lapic();
- pci_write_config32(pcidev_on_root(0x1f, 0), GPIO_BASE,
- DEFAULT_GPIOBASE | 1);
- pci_write_config8(pcidev_on_root(0x1f, 0), GPIO_CNTL,
- 0x10);
-
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_LFP, 2);

/* This sneaked in here, because EasyNote has no SuperIO chip.

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I0270c50dea2a2ce6c8e6114ed708f06be9d33c0e
Gerrit-Change-Number: 33141
Gerrit-PatchSet: 8
Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Alexander Couzens <lynxis@fe80.eu>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki@gmail.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-CC: Thomas Heijligen <src@posteo.de>
Gerrit-MessageType: merged