Wim Vervoorn has uploaded this change for review.

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soc/intel/skylake: Change SA_PCIEX_LENGTH to 256MB

Skylake soc code sets the length of the PCIe configuration space to 64
MB while the specification allows up to 256 MB. Linux reports "acpi
PNP0A08:00: [Firmware Info]: MMCONFIG for domain 0000 [bos 00-3f] only
partially covers this bridge".

Remove "select PCIEX_LENGTH_64MB" from Kconfig so the default 256MB will
be used and the size can be reduced on mainboard level when required.

BUG=N/A
TEST=tested on facebook monolith

Change-Id: I8a06b9fba5ad561d8595292a73136091ab532faa
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
---
M src/soc/intel/skylake/Kconfig
1 file changed, 0 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/37704/1
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 31f809a..5fc2a2d 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -43,7 +43,6 @@
select NO_FIXED_XIP_ROM_SIZE
select PARALLEL_MP
select PARALLEL_MP_AP_WORK
- select PCIEX_LENGTH_64MB
select PLATFORM_USES_FSP2_0
select REG_SCRIPT
select SA_ENABLE_DPR

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I8a06b9fba5ad561d8595292a73136091ab532faa
Gerrit-Change-Number: 37704
Gerrit-PatchSet: 1
Gerrit-Owner: Wim Vervoorn <wvervoorn@eltan.com>
Gerrit-MessageType: newchange