Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37198 ) Change subject: nb/amd/agesa: select ROMSTAGE_CACHED_CBMEM ...................................................................... Patch Set 7: Code-Review-1
Patch Set 7:
Patch Set 7:
While building for G505S (15h) I got:
CC romstage/southbridge/amd/agesa/hudson/smbus.o CC romstage/southbridge/amd/agesa/hudson/smbus_spd.o CC romstage/vendorcode/amd/agesa/common/agesa-entry.o LINK cbfs/fallback/romstage.debug OBJCOPY cbfs/fallback/romstage.elf make: *** No rule to make target '".car.data"', needed by 'build/coreboot.pre'. Stop.
But that's maybe because I selected a "Compress postcar with LZ4 (COMPRESS_POSTCAR) [Y/n/?] (NEW) y". Now will try without it
Hmmm, even if I answer N to this question, - still getting this error.
1. GCC (COMPILER_GCC)
1. Disabled (NO_STAGE_CACHE)
My full config is the latest revision of CB:32352 . After copying it to ./.config , I get these questions, most of which are auto-answered. Hope this is enough info for you to fix this change. I put -1 for now, but will be happy to upgrade it later Local version string (LOCALVERSION) [] Compiler to use 2. LLVM/clang (TESTING ONLY - Not currently working) (COMPILER_LLVM_CLANG) choice[1-2?]: 1 Allow building with any toolchain (ANY_TOOLCHAIN) [N/y/?] n Use ccache to speed up (re)compilation (CCACHE) [N/y/?] n Generate flashmap descriptor parser using flex and bison (FMD_GENPARSER) [N/y/?] n Generate SCONFIG & BINCFG parser using flex and bison (UTIL_GENPARSER) [N/y/?] n Use CMOS for configuration values (USE_OPTION_TABLE) [N/y/?] n Compress ramstage with LZMA (COMPRESS_RAMSTAGE) [Y/n/?] y Compress postcar with LZ4 (COMPRESS_POSTCAR) [Y/n/?] (NEW) n Include the coreboot .config file into the ROM image (INCLUDE_CONFIG_FILE) [Y/n/?] y Create a table of timestamps collected during boot (COLLECT_TIMESTAMPS) [Y/n/?] y Print the timestamp values on the console (TIMESTAMPS_ON_CONSOLE) [Y/n/?] y Allow use of binary-only repository (USE_BLOBS) [N/y/?] n Code coverage support (COVERAGE) [N/y/?] n Undefined behavior sanitizer support (UBSAN) [N/y/?] n Stage Cache for ACPI S3 resume 2. CBMEM (CBMEM_STAGE_CACHE) choice[1-2]: 1 Update existing coreboot.rom image (UPDATE_IMAGE) [N/y/?] n Add a bootsplash image (BOOTSPLASH_IMAGE) [N/y/?] n -- To view, visit https://review.coreboot.org/c/coreboot/+/37198 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I62ffe1bd646e9ddad77be240f030601790f4da4b Gerrit-Change-Number: 37198 Gerrit-PatchSet: 7 Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> Gerrit-Reviewer: Marshall Dawson <marshall.dawson@amd.corp-partner.google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski@3mdeb.com> Gerrit-Reviewer: Mike Banon <mikebdp2@gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-CC: Krystian Hebel <krystian.hebel@3mdeb.com> Gerrit-CC: Kyösti Mälkki <kyosti.malkki@gmail.com> Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net> Gerrit-Comment-Date: Sat, 30 May 2020 16:51:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment