Attention is currently required from: Philipp Hug, ron minnich.
Maximilian Brune has uploaded this change for review.
arch/riscv/boot.c: Add comment for clarity
It simply adds a comment to indicate to the reader that the
RISCV_PAYLOAD_MODE_S parameter causes OpenSBI to switch to Supervisor
mode. Otherwise it could be interpreted that coreboot switches to
Supervisor mode before starting OpenSBI (which is not the case)
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: Ib62be0c2ff59361200df4c65f9aca5f7456a0ada
---
M src/arch/riscv/boot.c
1 file changed, 4 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/79949/1
diff --git a/src/arch/riscv/boot.c b/src/arch/riscv/boot.c
index a59f9d1..6f744d3 100644
--- a/src/arch/riscv/boot.c
+++ b/src/arch/riscv/boot.c
@@ -31,10 +31,12 @@
fdt = prog_entry_arg(prog);
if (ENV_RAMSTAGE && prog_type(prog) == PROG_PAYLOAD) {
- if (CONFIG(RISCV_OPENSBI))
+ if (CONFIG(RISCV_OPENSBI)) {
+ // tell OpenSBI to switch to Supervisor mode before jumping to payload
run_payload_opensbi(prog, fdt, args->opensbi, RISCV_PAYLOAD_MODE_S);
- else
+ } else {
run_payload(prog, fdt, RISCV_PAYLOAD_MODE_S);
+ }
} else {
void (*doit)(int hart_id, void *fdt, void *arg) = prog_entry(prog);
doit(hart_id, fdt, prog_entry_arg(prog));
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