Srinidhi N Kaushik uploaded patch set #2 to this change.

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soc/intel/common/fast_spi: Add support for configuring MTRRs

This change enables caching for extended BIOS region.
Currently, caching is enabled for the standard BIOS region
upto a maximum of 16MiB using fast_spi_cache_bios_region,
used the same function to add the support for caching for
extended BIOS region as well.

Changes include:
1. Add a new helper function fast_spi_cache_ext_bios_region()
which calls fast_spi_get_ext_bios_window() to get details
about the extended BIOS window from the boot media map.
2. Make a call to fast_spi_cache_ext_bios_region() from
fast_spi_cache_bios_region ().
3. If the extended window is used, then it enables caching
for this window similar to how it is done for the standard window.

BUG=b:171534504

Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Change-Id: I9711f110a35a167efe3a4c912cf46c63c0812779
---
M src/soc/intel/common/block/fast_spi/fast_spi.c
1 file changed, 38 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/47991/2

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