2 comments:
File src/soc/intel/common/block/pmc/pmclib.c:
Patch Set #4, Line 434: soc_read_pmc_etr_addr();
Check for NULL and unaligned?
void pmc_global_reset_lock(void)
{
uint32_t *etr = soc_read_pmc_etr_addr();
uint32_t reg;
reg = read32(etr);
reg = (reg & ~CF9_GLB_RST) | CF9_LOCK;
write32(etr, reg);
}
besides that, why duplicate code again and again in soc/ when we can have a common function?
If you go through the complexity of implementing a callback to fetch an offset and do sanity check on it, just to clear and set a few bits at that offset it might as well be done per soc. That likely ends up with less code.
if it's PCI config register it is one line:
pci_update_config32(..., ETR, ~CF9_GLB_RST, CF9_LOCK);
if it's a MMIO reg it's 2 lines:
uint8_t *base = get_base_...
write32(base + ETR, (read32(base + ETR) & ~CF9_GLB_RST) | CF9_LOCK);
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