Attention is currently required from: Patrick Rudolph.

Arthur Heymans uploaded patch set #4 to this change.

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soc/intel/quark: Use common postcar MTRR setup

The common MTRR setup in postcar stage should now work for
intel/quark. The only difference is in the implementation of rdmsr and
wrmsr.

Change-Id: I9fe9dc458383930a75d9459f77e347241d8b6f33
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/arch/x86/exit_car.S
M src/include/cpu/x86/msr.h
M src/soc/intel/quark/romstage/Makefile.inc
D src/soc/intel/quark/romstage/mtrr.c
4 files changed, 0 insertions(+), 109 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/54300/4

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9fe9dc458383930a75d9459f77e347241d8b6f33
Gerrit-Change-Number: 54300
Gerrit-PatchSet: 4
Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@mailbox.org>
Gerrit-Attention: Patrick Rudolph <siro@das-labor.org>
Gerrit-MessageType: newpatchset