6 comments:
Patch Set #12, Line 13: b:none
b:142358843
File src/soc/mediatek/mt8183/dramc_pi_calibration_api.c:
Patch Set #9, Line 2142: return;
the DDR not response to the DRAM controler, the error result undefined!
Ack
Patch Set #9, Line 2214: void dramc_hw_dqsosc(u8 chn)
most of this is accomplished by the DRAM control hardware, no need detail description.
Ack
Patch Set #9, Line 2316: return ((n < 0) ^ (d < 0)) ? ((n - d/2)/d) : ((n + d/2)/d);
use DIV_ROUND_CLOSEST replace this API.remove this API later.
Ack
File src/soc/mediatek/mt8183/dramc_pi_calibration_api.c:
%#x
Patch Set #12, Line 2181: 0x%X
%#x
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