Attention is currently required from: Aamir Bohra.

Aamir Bohra uploaded patch set #4 to this change.

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mb/intel/shadowmountain: Add Cr50 support

Add Cr50 support over GSPI0. Also add a 20K internal
pull up for H1_TPM_INT_L(GPP_C3).

BUG=b:175579964
TEST=Verify TPM init is done in verstage.

Change-Id: I33f7427d1675190f65acf14679be93546e6db69a
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
---
M src/mainboard/intel/shadowmountain/Kconfig
M src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
M src/mainboard/intel/shadowmountain/variants/baseboard/early_gpio.c
M src/mainboard/intel/shadowmountain/variants/baseboard/gpio.c
4 files changed, 19 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/51086/4

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I33f7427d1675190f65acf14679be93546e6db69a
Gerrit-Change-Number: 51086
Gerrit-PatchSet: 4
Gerrit-Owner: Aamir Bohra <aamir.bohra@intel.com>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-Attention: Aamir Bohra <aamir.bohra@intel.com>
Gerrit-MessageType: newpatchset