Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50947 )
Change subject: soc/intel: Drop `romstage_pch_init()` function ......................................................................
soc/intel: Drop `romstage_pch_init()` function
It only calls `smbus_common_init()`, so just call that directly.
Change-Id: I0237f52bb9b0503e83f5dbf31c4064bd0f5bae28 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/50947 Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Reviewed-by: Michael Niewöhner foss@mniewoehner.de Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/alderlake/include/soc/romstage.h M src/soc/intel/alderlake/romstage/Makefile.inc D src/soc/intel/alderlake/romstage/pch.c M src/soc/intel/alderlake/romstage/romstage.c M src/soc/intel/cannonlake/include/soc/romstage.h M src/soc/intel/cannonlake/romstage/Makefile.inc D src/soc/intel/cannonlake/romstage/pch.c M src/soc/intel/cannonlake/romstage/romstage.c M src/soc/intel/elkhartlake/include/soc/romstage.h M src/soc/intel/elkhartlake/romstage/Makefile.inc D src/soc/intel/elkhartlake/romstage/pch.c M src/soc/intel/elkhartlake/romstage/romstage.c M src/soc/intel/icelake/include/soc/romstage.h M src/soc/intel/icelake/romstage/Makefile.inc D src/soc/intel/icelake/romstage/pch.c M src/soc/intel/icelake/romstage/romstage.c M src/soc/intel/jasperlake/include/soc/romstage.h M src/soc/intel/jasperlake/romstage/Makefile.inc D src/soc/intel/jasperlake/romstage/pch.c M src/soc/intel/jasperlake/romstage/romstage.c M src/soc/intel/skylake/include/soc/romstage.h M src/soc/intel/skylake/romstage/Makefile.inc D src/soc/intel/skylake/romstage/pch.c M src/soc/intel/skylake/romstage/romstage.c M src/soc/intel/tigerlake/include/soc/romstage.h M src/soc/intel/tigerlake/romstage/Makefile.inc D src/soc/intel/tigerlake/romstage/pch.c M src/soc/intel/tigerlake/romstage/romstage.c 28 files changed, 21 insertions(+), 98 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved Michael Niewöhner: Looks good to me, approved
diff --git a/src/soc/intel/alderlake/include/soc/romstage.h b/src/soc/intel/alderlake/include/soc/romstage.h index c72c8aa..13a5b5f 100644 --- a/src/soc/intel/alderlake/include/soc/romstage.h +++ b/src/soc/intel/alderlake/include/soc/romstage.h @@ -8,7 +8,6 @@
void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); -void romstage_pch_init(void);
/* Board type */ enum board_type { diff --git a/src/soc/intel/alderlake/romstage/Makefile.inc b/src/soc/intel/alderlake/romstage/Makefile.inc index a1a6c66..99c1d2c 100644 --- a/src/soc/intel/alderlake/romstage/Makefile.inc +++ b/src/soc/intel/alderlake/romstage/Makefile.inc @@ -3,5 +3,4 @@ romstage-y += fsp_params.c romstage-y += ../../../../cpu/intel/car/romstage.c romstage-y += romstage.c -romstage-y += pch.c romstage-y += systemagent.c diff --git a/src/soc/intel/alderlake/romstage/pch.c b/src/soc/intel/alderlake/romstage/pch.c deleted file mode 100644 index bec6150..0000000 --- a/src/soc/intel/alderlake/romstage/pch.c +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <intelblocks/smbus.h> -#include <soc/romstage.h> - -void romstage_pch_init(void) -{ - /* Program SMBus base address and enable it */ - smbus_common_init(); -} diff --git a/src/soc/intel/alderlake/romstage/romstage.c b/src/soc/intel/alderlake/romstage/romstage.c index 6cd22d0..cc3126b 100644 --- a/src/soc/intel/alderlake/romstage/romstage.c +++ b/src/soc/intel/alderlake/romstage/romstage.c @@ -7,6 +7,7 @@ #include <intelblocks/cfg.h> #include <intelblocks/cse.h> #include <intelblocks/pmclib.h> +#include <intelblocks/smbus.h> #include <memory_info.h> #include <soc/intel/common/smbios.h> #include <soc/iomap.h> @@ -120,8 +121,8 @@
/* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */ systemagent_early_init(); - /* Perform PCH init */ - romstage_pch_init(); + /* Program SMBus base address and enable it */ + smbus_common_init(); /* Initialize HECI interface */ heci_init(HECI1_BASE_ADDRESS);
diff --git a/src/soc/intel/cannonlake/include/soc/romstage.h b/src/soc/intel/cannonlake/include/soc/romstage.h index 3772db4..ba44f2d 100644 --- a/src/soc/intel/cannonlake/include/soc/romstage.h +++ b/src/soc/intel/cannonlake/include/soc/romstage.h @@ -7,7 +7,6 @@
void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); -void romstage_pch_init(void);
/* Board type */ enum board_type { diff --git a/src/soc/intel/cannonlake/romstage/Makefile.inc b/src/soc/intel/cannonlake/romstage/Makefile.inc index 261e5b3..3db9190 100644 --- a/src/soc/intel/cannonlake/romstage/Makefile.inc +++ b/src/soc/intel/cannonlake/romstage/Makefile.inc @@ -4,4 +4,3 @@ romstage-y += romstage.c romstage-y += fsp_params.c romstage-y += systemagent.c -romstage-y += pch.c diff --git a/src/soc/intel/cannonlake/romstage/pch.c b/src/soc/intel/cannonlake/romstage/pch.c deleted file mode 100644 index f94d611a..0000000 --- a/src/soc/intel/cannonlake/romstage/pch.c +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <intelblocks/smbus.h> -#include <soc/romstage.h> - -void romstage_pch_init(void) -{ - /* Program SMBUS_BASE_ADDRESS and enable it */ - smbus_common_init(); -} diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c index 0bf0404..a83cf61 100644 --- a/src/soc/intel/cannonlake/romstage/romstage.c +++ b/src/soc/intel/cannonlake/romstage/romstage.c @@ -7,6 +7,7 @@ #include <intelblocks/cfg.h> #include <intelblocks/cse.h> #include <intelblocks/pmclib.h> +#include <intelblocks/smbus.h> #include <memory_info.h> #include <soc/intel/common/smbios.h> #include <soc/iomap.h> @@ -121,8 +122,8 @@
/* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */ systemagent_early_init(); - /* Program PCH init */ - romstage_pch_init(); + /* Program SMBus base address and enable it */ + smbus_common_init(); /* initialize Heci interface */ heci_init(HECI1_BASE_ADDRESS);
diff --git a/src/soc/intel/elkhartlake/include/soc/romstage.h b/src/soc/intel/elkhartlake/include/soc/romstage.h index 3772db4..ba44f2d 100644 --- a/src/soc/intel/elkhartlake/include/soc/romstage.h +++ b/src/soc/intel/elkhartlake/include/soc/romstage.h @@ -7,7 +7,6 @@
void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); -void romstage_pch_init(void);
/* Board type */ enum board_type { diff --git a/src/soc/intel/elkhartlake/romstage/Makefile.inc b/src/soc/intel/elkhartlake/romstage/Makefile.inc index a1a6c66..99c1d2c 100644 --- a/src/soc/intel/elkhartlake/romstage/Makefile.inc +++ b/src/soc/intel/elkhartlake/romstage/Makefile.inc @@ -3,5 +3,4 @@ romstage-y += fsp_params.c romstage-y += ../../../../cpu/intel/car/romstage.c romstage-y += romstage.c -romstage-y += pch.c romstage-y += systemagent.c diff --git a/src/soc/intel/elkhartlake/romstage/pch.c b/src/soc/intel/elkhartlake/romstage/pch.c deleted file mode 100644 index d3c2554..0000000 --- a/src/soc/intel/elkhartlake/romstage/pch.c +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <intelblocks/smbus.h> -#include <soc/romstage.h> - -void romstage_pch_init(void) -{ - /* Program SMBUS_BASE_ADDRESS and Enable it */ - smbus_common_init(); -} diff --git a/src/soc/intel/elkhartlake/romstage/romstage.c b/src/soc/intel/elkhartlake/romstage/romstage.c index 7ca0318..ecbdd97 100644 --- a/src/soc/intel/elkhartlake/romstage/romstage.c +++ b/src/soc/intel/elkhartlake/romstage/romstage.c @@ -7,6 +7,7 @@ #include <intelblocks/cfg.h> #include <intelblocks/cse.h> #include <intelblocks/pmclib.h> +#include <intelblocks/smbus.h> #include <memory_info.h> #include <soc/intel/common/smbios.h> #include <soc/iomap.h> @@ -127,8 +128,8 @@
/* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */ systemagent_early_init(); - /* Program PCH init */ - romstage_pch_init(); + /* Program SMBus base address and enable it */ + smbus_common_init(); /* initialize Heci interface */ heci_init(HECI1_BASE_ADDRESS);
diff --git a/src/soc/intel/icelake/include/soc/romstage.h b/src/soc/intel/icelake/include/soc/romstage.h index 3772db4..ba44f2d 100644 --- a/src/soc/intel/icelake/include/soc/romstage.h +++ b/src/soc/intel/icelake/include/soc/romstage.h @@ -7,7 +7,6 @@
void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); -void romstage_pch_init(void);
/* Board type */ enum board_type { diff --git a/src/soc/intel/icelake/romstage/Makefile.inc b/src/soc/intel/icelake/romstage/Makefile.inc index a1a6c66..99c1d2c 100644 --- a/src/soc/intel/icelake/romstage/Makefile.inc +++ b/src/soc/intel/icelake/romstage/Makefile.inc @@ -3,5 +3,4 @@ romstage-y += fsp_params.c romstage-y += ../../../../cpu/intel/car/romstage.c romstage-y += romstage.c -romstage-y += pch.c romstage-y += systemagent.c diff --git a/src/soc/intel/icelake/romstage/pch.c b/src/soc/intel/icelake/romstage/pch.c deleted file mode 100644 index d3c2554..0000000 --- a/src/soc/intel/icelake/romstage/pch.c +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <intelblocks/smbus.h> -#include <soc/romstage.h> - -void romstage_pch_init(void) -{ - /* Program SMBUS_BASE_ADDRESS and Enable it */ - smbus_common_init(); -} diff --git a/src/soc/intel/icelake/romstage/romstage.c b/src/soc/intel/icelake/romstage/romstage.c index 1517974..1dc618c 100644 --- a/src/soc/intel/icelake/romstage/romstage.c +++ b/src/soc/intel/icelake/romstage/romstage.c @@ -7,6 +7,7 @@ #include <intelblocks/cfg.h> #include <intelblocks/cse.h> #include <intelblocks/pmclib.h> +#include <intelblocks/smbus.h> #include <memory_info.h> #include <soc/intel/common/smbios.h> #include <soc/iomap.h> @@ -110,8 +111,8 @@
/* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */ systemagent_early_init(); - /* Program PCH init */ - romstage_pch_init(); + /* Program SMBus base address and enable it */ + smbus_common_init(); /* initialize Heci interface */ heci_init(HECI1_BASE_ADDRESS);
diff --git a/src/soc/intel/jasperlake/include/soc/romstage.h b/src/soc/intel/jasperlake/include/soc/romstage.h index 3772db4..ba44f2d 100644 --- a/src/soc/intel/jasperlake/include/soc/romstage.h +++ b/src/soc/intel/jasperlake/include/soc/romstage.h @@ -7,7 +7,6 @@
void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); -void romstage_pch_init(void);
/* Board type */ enum board_type { diff --git a/src/soc/intel/jasperlake/romstage/Makefile.inc b/src/soc/intel/jasperlake/romstage/Makefile.inc index a1a6c66..99c1d2c 100644 --- a/src/soc/intel/jasperlake/romstage/Makefile.inc +++ b/src/soc/intel/jasperlake/romstage/Makefile.inc @@ -3,5 +3,4 @@ romstage-y += fsp_params.c romstage-y += ../../../../cpu/intel/car/romstage.c romstage-y += romstage.c -romstage-y += pch.c romstage-y += systemagent.c diff --git a/src/soc/intel/jasperlake/romstage/pch.c b/src/soc/intel/jasperlake/romstage/pch.c deleted file mode 100644 index d3c2554..0000000 --- a/src/soc/intel/jasperlake/romstage/pch.c +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <intelblocks/smbus.h> -#include <soc/romstage.h> - -void romstage_pch_init(void) -{ - /* Program SMBUS_BASE_ADDRESS and Enable it */ - smbus_common_init(); -} diff --git a/src/soc/intel/jasperlake/romstage/romstage.c b/src/soc/intel/jasperlake/romstage/romstage.c index 6d34b43..f7e6a91 100644 --- a/src/soc/intel/jasperlake/romstage/romstage.c +++ b/src/soc/intel/jasperlake/romstage/romstage.c @@ -7,6 +7,7 @@ #include <intelblocks/cfg.h> #include <intelblocks/cse.h> #include <intelblocks/pmclib.h> +#include <intelblocks/smbus.h> #include <memory_info.h> #include <soc/intel/common/smbios.h> #include <soc/iomap.h> @@ -127,8 +128,8 @@
/* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */ systemagent_early_init(); - /* Program PCH init */ - romstage_pch_init(); + /* Program SMBus base address and enable it */ + smbus_common_init(); /* initialize Heci interface */ heci_init(HECI1_BASE_ADDRESS);
diff --git a/src/soc/intel/skylake/include/soc/romstage.h b/src/soc/intel/skylake/include/soc/romstage.h index 3772db4..ba44f2d 100644 --- a/src/soc/intel/skylake/include/soc/romstage.h +++ b/src/soc/intel/skylake/include/soc/romstage.h @@ -7,7 +7,6 @@
void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); -void romstage_pch_init(void);
/* Board type */ enum board_type { diff --git a/src/soc/intel/skylake/romstage/Makefile.inc b/src/soc/intel/skylake/romstage/Makefile.inc index 1b069b6..dff89ce 100644 --- a/src/soc/intel/skylake/romstage/Makefile.inc +++ b/src/soc/intel/skylake/romstage/Makefile.inc @@ -1,4 +1,3 @@ romstage-y += ../../../../cpu/intel/car/romstage.c romstage-y += romstage.c romstage-y += systemagent.c -romstage-y += pch.c diff --git a/src/soc/intel/skylake/romstage/pch.c b/src/soc/intel/skylake/romstage/pch.c deleted file mode 100644 index f94d611a..0000000 --- a/src/soc/intel/skylake/romstage/pch.c +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <intelblocks/smbus.h> -#include <soc/romstage.h> - -void romstage_pch_init(void) -{ - /* Program SMBUS_BASE_ADDRESS and enable it */ - smbus_common_init(); -} diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c index a20f279..97d21b2 100644 --- a/src/soc/intel/skylake/romstage/romstage.c +++ b/src/soc/intel/skylake/romstage/romstage.c @@ -10,6 +10,7 @@ #include <fsp/util.h> #include <intelblocks/cpulib.h> #include <intelblocks/pmclib.h> +#include <intelblocks/smbus.h> #include <memory_info.h> #include <smbios.h> #include <soc/intel/common/smbios.h> @@ -132,8 +133,8 @@
/* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */ systemagent_early_init(); - /* Program PCH init */ - romstage_pch_init(); + /* Program SMBus base address and enable it */ + smbus_common_init(); ps = pmc_get_power_state(); s3wake = pmc_fill_power_state(ps) == ACPI_S3; fsp_memory_init(s3wake); diff --git a/src/soc/intel/tigerlake/include/soc/romstage.h b/src/soc/intel/tigerlake/include/soc/romstage.h index 3772db4..ba44f2d 100644 --- a/src/soc/intel/tigerlake/include/soc/romstage.h +++ b/src/soc/intel/tigerlake/include/soc/romstage.h @@ -7,7 +7,6 @@
void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); -void romstage_pch_init(void);
/* Board type */ enum board_type { diff --git a/src/soc/intel/tigerlake/romstage/Makefile.inc b/src/soc/intel/tigerlake/romstage/Makefile.inc index a1a6c66..99c1d2c 100644 --- a/src/soc/intel/tigerlake/romstage/Makefile.inc +++ b/src/soc/intel/tigerlake/romstage/Makefile.inc @@ -3,5 +3,4 @@ romstage-y += fsp_params.c romstage-y += ../../../../cpu/intel/car/romstage.c romstage-y += romstage.c -romstage-y += pch.c romstage-y += systemagent.c diff --git a/src/soc/intel/tigerlake/romstage/pch.c b/src/soc/intel/tigerlake/romstage/pch.c deleted file mode 100644 index d3c2554..0000000 --- a/src/soc/intel/tigerlake/romstage/pch.c +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <intelblocks/smbus.h> -#include <soc/romstage.h> - -void romstage_pch_init(void) -{ - /* Program SMBUS_BASE_ADDRESS and Enable it */ - smbus_common_init(); -} diff --git a/src/soc/intel/tigerlake/romstage/romstage.c b/src/soc/intel/tigerlake/romstage/romstage.c index 8b7dc23..872cca5 100644 --- a/src/soc/intel/tigerlake/romstage/romstage.c +++ b/src/soc/intel/tigerlake/romstage/romstage.c @@ -7,6 +7,7 @@ #include <intelblocks/cfg.h> #include <intelblocks/cse.h> #include <intelblocks/pmclib.h> +#include <intelblocks/smbus.h> #include <memory_info.h> #include <soc/intel/common/smbios.h> #include <soc/iomap.h> @@ -127,8 +128,8 @@
/* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */ systemagent_early_init(); - /* Program PCH init */ - romstage_pch_init(); + /* Program SMBus base address and enable it */ + smbus_common_init(); /* initialize Heci interface */ heci_init(HECI1_BASE_ADDRESS);