Mario Scheithauer has uploaded this change for review.

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siemens/mc_apl5: Remove reduced clock rate for I2C0

There is no device on I2C0 which requires a lower clock rate.

Change-Id: Iaf01be5ea4839c54eb2f0ba95bca272970c24bdb
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
---
M src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
1 file changed, 0 insertions(+), 12 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/32139/1
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
index 989ab45..15be7ff 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
@@ -49,18 +49,6 @@
# Enable Vtd feature
register "enable_vtd" = "1"

- # Intel Common SoC Config
- #+-------------------+---------------------------+
- #| Field | Value |
- #+-------------------+---------------------------+
- #| I2C0 | Proximity Sensor |
- #+-------------------+---------------------------+
- register "common_soc_config" = "{
- .i2c[0] = {
- .speed = I2C_SPEED_STANDARD
- },
- }"
-
device domain 0 on
device pci 00.0 on end # - Host Bridge
device pci 00.1 off end # - DPTF

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Iaf01be5ea4839c54eb2f0ba95bca272970c24bdb
Gerrit-Change-Number: 32139
Gerrit-PatchSet: 1
Gerrit-Owner: Mario Scheithauer <mario.scheithauer@siemens.com>
Gerrit-MessageType: newchange