Angel Pons submitted this change.
soc/intel/broadwell/pch/acpi/irqlinks.asl: Add missing IRQs
Commit 2e1f764 (sb/intel/common/acpi/irqlinks.asl: Add missing IRQs)
added these IRQs for Lynx Point and earlier southbridges. Follow suit
for Broadwell, since it also supports them. Vendor firmware of the Asus
X555LAB laptop also contains these IRQs, as per the disassembled DSDT.
Change-Id: If857352dd25ba61c1f09c1ff4358efafdc3a5c73
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46758
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/soc/intel/broadwell/pch/acpi/irqlinks.asl
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/src/soc/intel/broadwell/pch/acpi/irqlinks.asl b/src/soc/intel/broadwell/pch/acpi/irqlinks.asl
index 0661ff8..8a63ba5 100644
--- a/src/soc/intel/broadwell/pch/acpi/irqlinks.asl
+++ b/src/soc/intel/broadwell/pch/acpi/irqlinks.asl
@@ -15,7 +15,7 @@
Name (_PRS, ResourceTemplate()
{
IRQ (Level, ActiveLow, Shared)
- { 3, 4, 5, 6, 7, 10, 12, 14, 15 }
+ { 3, 4, 5, 6, 7, 10, 11, 12, 14, 15 }
})
// Current Resource Settings for this link
@@ -74,7 +74,7 @@
Name (_PRS, ResourceTemplate()
{
IRQ (Level, ActiveLow, Shared)
- { 3, 4, 5, 6, 7, 11, 12, 14, 15 }
+ { 3, 4, 5, 6, 7, 10, 11, 12, 14, 15 }
})
// Current Resource Settings for this link
@@ -133,7 +133,7 @@
Name (_PRS, ResourceTemplate()
{
IRQ (Level, ActiveLow, Shared)
- { 3, 4, 5, 6, 7, 10, 12, 14, 15 }
+ { 3, 4, 5, 6, 7, 10, 11, 12, 14, 15 }
})
// Current Resource Settings for this link
@@ -192,7 +192,7 @@
Name (_PRS, ResourceTemplate()
{
IRQ (Level, ActiveLow, Shared)
- { 3, 4, 5, 6, 7, 11, 12, 14, 15 }
+ { 3, 4, 5, 6, 7, 10, 11, 12, 14, 15 }
})
// Current Resource Settings for this link
@@ -251,7 +251,7 @@
Name (_PRS, ResourceTemplate()
{
IRQ (Level, ActiveLow, Shared)
- { 3, 4, 5, 6, 7, 10, 12, 14, 15 }
+ { 3, 4, 5, 6, 7, 10, 11, 12, 14, 15 }
})
// Current Resource Settings for this link
@@ -310,7 +310,7 @@
Name (_PRS, ResourceTemplate()
{
IRQ (Level, ActiveLow, Shared)
- { 3, 4, 5, 6, 7, 11, 12, 14, 15 }
+ { 3, 4, 5, 6, 7, 10, 11, 12, 14, 15 }
})
// Current Resource Settings for this link
@@ -369,7 +369,7 @@
Name (_PRS, ResourceTemplate()
{
IRQ (Level, ActiveLow, Shared)
- { 3, 4, 5, 6, 7, 10, 12, 14, 15 }
+ { 3, 4, 5, 6, 7, 10, 11, 12, 14, 15 }
})
// Current Resource Settings for this link
@@ -428,7 +428,7 @@
Name (_PRS, ResourceTemplate()
{
IRQ (Level, ActiveLow, Shared)
- { 3, 4, 5, 6, 7, 11, 12, 14, 15 }
+ { 3, 4, 5, 6, 7, 10, 11, 12, 14, 15 }
})
// Current Resource Settings for this link
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