Patch Set 25:

Patch Set 25:

Do you think that L1 substates should be guarded by that Kconfig?

it wouldn't hurt to add 'CONFIG(PCIEXP_L1_SUB_STATE) &&' to the front of the if statement

That's not the config that I meant. As Nico said, coreboot can enable L1 substates if the FSP says that it's capable. We can use this UPD to get finer-grained control over which devices have L1SS enabled. This may be useful if, for example, only one devices misbehaves with L1SS. In other words, as I understand it, "PCIEXP_L1_SUB_STATE" depends on the FSP UPD (per root-port).

One dependency for L1 substates is clock PM

Should L1SS be guarded by PCIEXP_CLK_PM?

View Change

To view, visit change 39538. To unsubscribe, or for help writing mail filters, visit settings.

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I36150858485715016158595c832c142b0582ddb8
Gerrit-Change-Number: 39538
Gerrit-PatchSet: 25
Gerrit-Owner: Benjamin Doron <benjamin.doron00@gmail.com>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Benjamin Doron <benjamin.doron00@gmail.com>
Gerrit-Reviewer: Matt DeVillier <matt.devillier@gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h@gmx.de>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-Comment-Date: Thu, 08 Oct 2020 20:06:06 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: No
Gerrit-MessageType: comment