Sumeet R Pawnikar uploaded patch set #4 to this change.

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soc/intel/cannonlake: Enable PCH Thermal Sensor configuration for S0ix

Enable PCH thermal sensor for dynamic thermal shutdown for S0ix state.

BUG=None
BRANCH=None
TEST=Verified Thermal Device (B0: D18: F0) TSPM offset 0x1c [LTT (8:0)]
value is 0xFE.

Change-Id: I50796bcf9e0d5a65cd7ba63fedd932967c4c1ff9
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
---
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/cannonlake/finalize.c
2 files changed, 12 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/34522/4

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