Thanks for the review. All the comments so far are addressed.
We plan to work on this code base (support for Xeon-SP processors and their OCP platforms) in 3 phases:
Phase 1: initial code base. It supports the previous generation of Xeon-SP processor (Skylake-SP), and one OCP platform (TiogaPass). This patch set is verified to boot to target OS on several TiogaPass servers with slightly different configurations (such as CPU core count, PCIe config, socket count, etc.). Pending item of this phase is to merge this patch set into coreboot upstream.
Phase 2. Support for current Xeon-SP processors. We are working on bring-up of current generation of Xeon-SP processor (Note that SKX-SP was in Mass Production as of 2018). The code base will be refactored/improved, it will support both Xeon-SP processors and multiple OCP platform (Most of the OCP platform are yet to be announced). This is the multi-company teams' focus right now.
Phase 3. Nicer integration with coreboot common code. Through lessons learned from Xeon-SP code base, we will see what we could do to improve coreboot common code, if any.
Let us know if you have any further comments, we will address them as soon as we can.
Best,
Jonathan
1 comment:
File src/mainboard/ocp/tiogapass/Kconfig:
Why not?
Done
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