Felix Singer has uploaded this change for review.

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sb/intel/bd82x6x/sata: Don't write RO register

Change-Id: Ide5f101b2e5bda84f3c2ff8c8ca636b8233bb948
Signed-off-by: Felix Singer <felix.singer@secunet.com>
---
M src/southbridge/intel/bd82x6x/sata.c
1 file changed, 0 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/40229/1

diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c
index e04f3ba..5bf6a2b 100644
--- a/src/southbridge/intel/bd82x6x/sata.c
+++ b/src/southbridge/intel/bd82x6x/sata.c
@@ -131,10 +131,6 @@
 		 */
 		pci_write_config8(dev, 0x09, 0x8f);
 
-		/* Set Interrupt Line */
-		/* Interrupt Pin is set by D31IP.PIP */
-		pci_write_config8(dev, INTR_LN, 0xff);
-
 		/* Set timings */
 		pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE |
 				IDE_ISP_3_CLOCKS | IDE_RCT_1_CLOCKS |

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