Patrick Georgi (pgeorgi@google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15961
-gerrit
commit b8c0daaa45a158aa35669570fa35863596fde0bd Author: Patrick Georgi pgeorgi@chromium.org Date: Fri Jul 29 18:23:32 2016 +0200
sis/sis966: fix typo
temp8 & (!0x10) == temp8 & 0 == 0, which is certainly not intended.
Change-Id: Ie9f735d31eedbec171f82929a147fc1b2e30b45a Signed-off-by: Patrick Georgi pgeorgi@chromium.org Found-by: Coverity Scan #1229587 --- src/southbridge/sis/sis966/early_smbus.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/southbridge/sis/sis966/early_smbus.c b/src/southbridge/sis/sis966/early_smbus.c index df91c86..15d4f4c 100644 --- a/src/southbridge/sis/sis966/early_smbus.c +++ b/src/southbridge/sis/sis966/early_smbus.c @@ -578,7 +578,7 @@ static void sis_init_stage1(void) dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS, PCI_DEVICE_ID_SIS_SIS761), 0); //Disable Internal GUI enable bit temp8 = pci_read_config8(dev, 0x4C); GUI_En = temp8 & 0x10; - pci_write_config8(dev, 0x4C, temp8 & (!0x10)); + pci_write_config8(dev, 0x4C, temp8 & (~0x10));
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS, PCI_DEVICE_ID_SIS_SIS761_PCIE), 0); i=0;