Ronak Kanabar uploaded patch set #8 to this change.

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soc/intel/tigerlake: Correct order of "RUN_FSP_GOP" check

coreboot was programming DDI_BUF_CTL in case GOP/VBIOS is
not executed. When RUN_FSP_GOP config is selected, GOP will
be executed and we don't need to program DDI_BUF_CTL.
Hence move the check before DDI_BUF_CTL programming.

In case display is not connected, it may cause hang since GOP
is also programming DDI_BUF_CTL before coreboot graphics_init
call.

BUG=b:150788968
BRANCH=None
TEST=checked jslrvp and tglrvp compilation and boot.

Change-Id: I32692501b60f48a07b8fbb9bb3a755b18f4b3ea9
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
---
M src/soc/intel/tigerlake/graphics.c
1 file changed, 12 insertions(+), 12 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/39313/8

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