Felix Held submitted this change.

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Approvals: Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified Felix Held: Looks good to me, approved
soc/amd/common: Fix typo

Change-Id: Ida6e87908ae6996529057c8df12dbe046ee54b98
Signed-off-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80161
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
---
M src/soc/amd/common/fsp/pci/pcie_clk_req.c
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/soc/amd/common/fsp/pci/pcie_clk_req.c b/src/soc/amd/common/fsp/pci/pcie_clk_req.c
index 881c650..a16b0de 100644
--- a/src/soc/amd/common/fsp/pci/pcie_clk_req.c
+++ b/src/soc/amd/common/fsp/pci/pcie_clk_req.c
@@ -7,7 +7,7 @@
#include <device/pci_ids.h>
#include <soc/platform_descriptors.h>

-/* Update gpp glk req config based on DXIO descriptors and enabled devices. */
+/* Update gpp clk req config based on DXIO descriptors and enabled devices. */
void pcie_gpp_dxio_update_clk_req_config(enum gpp_clk_req *gpp_clk_config,
size_t gpp_clk_config_num)
{

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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ida6e87908ae6996529057c8df12dbe046ee54b98
Gerrit-Change-Number: 80161
Gerrit-PatchSet: 2
Gerrit-Owner: Varshit Pandya <pandyavarshit@gmail.com>
Gerrit-Reviewer: Felix Held <felix-coreboot@felixheld.de>
Gerrit-Reviewer: Fred Reitberger <reitbergerfred@gmail.com>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk@gmail.com>
Gerrit-Reviewer: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged