HAOUAS Elyes has uploaded this change for review.
nb/intel/i945: Check if interleaved even if rank[4] size is zero
With this patch, the board can boot when interleaved but rank4 is 0.
Tested on 945G-M4, it boot when:
DIMM0 + DIMM2 populated: Ok
DIMM0 + DIMM3 populated: Ok
DIMM1 + DIMM2 populated: Ok
DIMM1 + DIMM3 populated: Ok
raminit.c still needs channelA populated. It will not boot if
channel A is not populated.
Change-Id: Ibf130a3d4b6f8fa816f7a5f06822a9b8807be3d4
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
---
M src/northbridge/intel/i945/raminit.c
1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/31007/1
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 64c87da..a46677b 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -2551,9 +2551,6 @@
u32 bankaddr = 0, tmpaddr, mrsaddr = 0;
for (i = 0, nonzero = -1; i < 8; i++) {
- if (sysinfo->banksize[i] == 0)
- continue;
-
printk(BIOS_DEBUG, "jedec enable sequence: bank %d\n", i);
switch (i) {
case 0:
@@ -2576,6 +2573,9 @@
bankaddr = 0;
}
+ if (sysinfo->banksize[i] == 0)
+ continue;
+
/* We have a bank with a non-zero size.. Remember it
* for the next offset we have to calculate
*/
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