Martin Roth has uploaded this change for review.

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arch/x86: Add option for running Romstage out of RAM

AMD's Picasso SOC brings up memory before releasing the X86 processor,
and jumps directly to Romstage.  Add a global config option to handle
that.

TEST=None
BUG=b:130804851

Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: I678b1f74546ea30abcc655a0daed795d6cfa0034
---
M src/Kconfig
M src/arch/x86/assembly_entry.S
M src/arch/x86/memlayout.ld
3 files changed, 25 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/32414/1

diff --git a/src/Kconfig b/src/Kconfig
index 62b3818..bfa0b51 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -146,6 +146,16 @@
 	  time spent decompressing. Doesn't work for XIP stages (assume all
 	  ARCH_X86 for now) for obvious reasons.
 
+config ROMSTAGE_IN_RAM
+	bool
+	depends on ARCH_X86
+	help
+	  Some newer x86 processors come alive with memory enabled, and the
+	  reset vector's physical address falling within DRAM.  Select this
+	  item to build romstage to execute in DRAM instead of XIP.  Because
+	  this is not a standard, the soc/ or cpu/ code must handle the reset
+	  natively before jumping into the standard romstage code.
+
 config COMPRESS_BOOTBLOCK
 	bool
 	help
diff --git a/src/arch/x86/assembly_entry.S b/src/arch/x86/assembly_entry.S
index 4ead9ea..01c0865 100644
--- a/src/arch/x86/assembly_entry.S
+++ b/src/arch/x86/assembly_entry.S
@@ -26,6 +26,16 @@
  * variables that are stage specific.
  */
 .section ".text._start", "ax", @progbits
+#if ENV_ROMSTAGE && IS_ENABLED(CONFIG_ROMSTAGE_IN_RAM)
+/*
+ * Systems that run romstage in DRAM, i.e. where romstage is the first
+ * executed code, are responsible for getting the processor into protected
+ * mode, setting the stack pointer, and jumping to this location.
+ */
+.global _romstage_in_ram_continue
+_romstage_in_ram_continue:
+
+#else
 .global _start
 _start:
 
@@ -34,6 +44,7 @@
 
 	/* reset stack pointer to CAR stack */
 	mov	$_car_stack_end, %esp
+#endif
 
 	/* clear CAR_GLOBAL area as it is not shared */
 	cld
diff --git a/src/arch/x86/memlayout.ld b/src/arch/x86/memlayout.ld
index cc72552..da63b05 100644
--- a/src/arch/x86/memlayout.ld
+++ b/src/arch/x86/memlayout.ld
@@ -57,6 +57,10 @@
 #endif
 }
 
+#if ENV_ROMSTAGE && CONFIG(ROMSTAGE_IN_RAM)
+#include <soc/romstage.ld>
+#endif
+
 #if ENV_BOOTBLOCK
 /* Bootblock specific scripts which provide more SECTION directives. */
 #include <cpu/x86/16bit/entry16.ld>

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