Marshall Dawson uploaded patch set #3 to this change.

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amd/stoneyridge: Put stage cache into TSEG

Add a function to allow an external region to be located in TSEG.
Select the option to use memory outside of cbmem.  Increase the size
reserved in TSEG.

BUG=b:70900190

Change-Id: Ic1073af04475d862753136c9e14e2b2dde31fe66
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
---
M src/soc/amd/stoneyridge/Kconfig
M src/soc/amd/stoneyridge/ramtop.c
2 files changed, 36 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/23519/3

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