Is there any way to verify this?
I can only test this on a mt8173 device I have, but each platform uses different approach to setup its reserved range..
(Or maybe it's not a good idea to break compatibility?)

Review is enough... we aren't *that* afraid of breaking things in coreboot, and this change isn't crazy hard to grok. Stifling all innovation because people are too afraid of breaking old junk isn't great either.

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3 comments:

• File src/soc/cavium/cn81xx/soc.c:

  • Patch Set #6, Line 332: BM_MEM_BL31);

    Rather than doing this in every SoC this should be added to arm64's bootmem_arch_ranges(). You can use DECLARE_OPTIONAL_REGION(bl31) and test for _bl31_size to be non-zero before adding it so that platform with some weird special requirements have an out.

• File src/soc/nvidia/tegra210/soc.c:

  • Patch Set #6, Line 53: bootmem_add_range(begin * KiB * KiB, size * KiB * KiB, type);

    This is one of those examples where it's probably a good idea to have the platform handle it separately and not put it in memlayout.

• File src/soc/rockchip/rk3399/soc.c:

  • Patch Set #6, Line 41: bootmem_add_range(TZRAM_BASE, TZRAM_SIZE, BM_MEM_BL31);

    FYI, the range here (that should now be hardcoded in memlayout) is [0x0:0x100000] (from https://github.com/ARM-software/arm-trusted-firmware/blob/master/plat/rockchip/rk3399/include/shared/bl31_param.h).

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