Felix Singer has uploaded this change for review.
soc/intel/denverton: Move PCI IDs to pci_ids.h
This patch moves the PCI ID definitions to pci_ids.h file
and replaces every occurrence with the new names.
The resulting binary doesn't differ from the one
without this patch.
Used documents:
- Intel 337018
Change-Id: Ib7d2aae78c8877f3c9287d03b20a5620db293445
Signed-off-by: Felix Singer <felix.singer@9elements.com>
---
M src/include/device/pci_ids.h
M src/soc/intel/denverton_ns/csme_ie_kt.c
M src/soc/intel/denverton_ns/include/soc/pci_devs.h
M src/soc/intel/denverton_ns/lpc.c
M src/soc/intel/denverton_ns/npk.c
M src/soc/intel/denverton_ns/pmc.c
M src/soc/intel/denverton_ns/sata.c
M src/soc/intel/denverton_ns/systemagent.c
M src/soc/intel/denverton_ns/uart.c
M src/soc/intel/denverton_ns/xhci.c
10 files changed, 45 insertions(+), 53 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/37120/1
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 18d6f60..c7b87b0 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -2675,6 +2675,40 @@
#define PCI_DEVICE_ID_INTEL_PCIE_PB 0x3597
#define PCI_DEVICE_ID_INTEL_PCIE_PC 0x3599
+/* Intel Denverton (Atom C3000 family) */
+#define PCI_DEVICE_ID_INTEL_DENVERTON_SA 0x1980
+#define PCI_DEVICE_ID_INTEL_DENVERTONAD_SA 0x1995
+#define PCI_DEVICE_ID_INTEL_DENVERTON_PCIE_RP0 0x19a4
+#define PCI_DEVICE_ID_INTEL_DENVERTON_PCIE_RP1 0x19a5
+#define PCI_DEVICE_ID_INTEL_DENVERTON_PCIE_RP2 0x19a6
+#define PCI_DEVICE_ID_INTEL_DENVERTON_PCIE_RP3 0x19a7
+#define PCI_DEVICE_ID_INTEL_DENVERTON_PCIE_RP4 0x19a8
+#define PCI_DEVICE_ID_INTEL_DENVERTON_PCIE_RP5 0x19a9
+#define PCI_DEVICE_ID_INTEL_DENVERTON_PCIE_RP6 0x19aa
+#define PCI_DEVICE_ID_INTEL_DENVERTON_PCIE_RP7 0x19ab
+#define PCI_DEVICE_ID_INTEL_DENVERTON_SMBUS 0x19ac
+#define PCI_DEVICE_ID_INTEL_DENVERTON_SATA_AHCI_1 0x19b2
+#define PCI_DEVICE_ID_INTEL_DENVERTON_SATA_AHCI_2 0x19c2
+#define PCI_DEVICE_ID_INTEL_DENVERTON_XHCI 0x19d0
+#define PCI_DEVICE_ID_INTEL_DENVERTON_LAN_1 0x19d1
+#define PCI_DEVICE_ID_INTEL_DENVERTON_LAN_2 0x19d2
+#define PCI_DEVICE_ID_INTEL_DENVERTON_ME_HECI_1 0x19d3
+#define PCI_DEVICE_ID_INTEL_DENVERTON_ME_HECI_2 0x19d4
+#define PCI_DEVICE_ID_INTEL_DENVERTON_ME_KT 0x19d5
+#define PCI_DEVICE_ID_INTEL_DENVERTON_ME_HECI_3 0x19d6
+#define PCI_DEVICE_ID_INTEL_DENVERTON_HSUART 0x19d8
+#define PCI_DEVICE_ID_INTEL_DENVERTON_IE_HECI_1 0x19e5
+#define PCI_DEVICE_ID_INTEL_DENVERTON_IE_HECI_2 0x19e6
+#define PCI_DEVICE_ID_INTEL_DENVERTON_IE_KT 0x19e8
+#define PCI_DEVICE_ID_INTEL_DENVERTON_IE_HECI_3 0x19e9
+#define PCI_DEVICE_ID_INTEL_DENVERTON_EMMC 0x19db
+#define PCI_DEVICE_ID_INTEL_DENVERTON_LPC 0x19dc
+#define PCI_DEVICE_ID_INTEL_DENVERTON_P2SB 0x19dd
+#define PCI_DEVICE_ID_INTEL_DENVERTON_PMC 0x19de
+#define PCI_DEVICE_ID_INTEL_DENVERTON_SMBUS_LEGACY 0x19df
+#define PCI_DEVICE_ID_INTEL_DENVERTON_SPI 0x19e0
+#define PCI_DEVICE_ID_INTEL_DENVERTON_TRACEHUB 0x19e1
+
/* Intel LPC device ids */
#define PCI_DEVICE_ID_INTEL_LPT_MOBILE_SAMPLE 0x8c41
#define PCI_DEVICE_ID_INTEL_LPT_DESKTOP_SAMPLE 0x8c42
diff --git a/src/soc/intel/denverton_ns/csme_ie_kt.c b/src/soc/intel/denverton_ns/csme_ie_kt.c
index 5967840..2b730e9 100644
--- a/src/soc/intel/denverton_ns/csme_ie_kt.c
+++ b/src/soc/intel/denverton_ns/csme_ie_kt.c
@@ -77,8 +77,8 @@
};
static const unsigned short pci_device_ids[] = {
- ME_MEKT_DEVID, /* DVN CSME KT */
- IE_MEKT_DEVID, /* DVN IE KT */
+ PCI_DEVICE_ID_INTEL_DENVERTON_ME_KT,
+ PCI_DEVICE_ID_INTEL_DENVERTON_IE_KT,
0
};
diff --git a/src/soc/intel/denverton_ns/include/soc/pci_devs.h b/src/soc/intel/denverton_ns/include/soc/pci_devs.h
index faa4d92..a300fd4 100644
--- a/src/soc/intel/denverton_ns/include/soc/pci_devs.h
+++ b/src/soc/intel/denverton_ns/include/soc/pci_devs.h
@@ -158,46 +158,4 @@
#define PCH_DEV_LPC _PCH_DEV(LPC, 0)
#define PCH_DEV_SPI _PCH_DEV(LPC, 5)
-#define SA_DEVID 0x1980
-#define SA_DEVID_DNVAD 0x1995
-#define SOC_DEVID SA_DEVID
-#define RAS_DEVID 0x19a1
-#define RCEC_DEVID 0x19a2
-#define VRP2_DEVID 0x19a3
-#define PCIE_PORT1_DEVID 0x19a4
-#define PCIE_PORT2_DEVID 0x19a5
-#define PCIE_PORT3_DEVID 0x19a6
-#define PCIE_PORT4_DEVID 0x19a7
-#define PCIE_PORT5_DEVID 0x19a8
-#define PCIE_PORT6_DEVID 0x19a9
-#define PCIE_PORT7_DEVID 0x19aa
-#define PCIE_PORT8_DEVID 0x19ab
-#define SMBUS2_DEVID 0x19ac
-#define AHCI_DEVID 0x19b2
-#define AHCI2_DEVID 0x19c2
-#define XHCI_DEVID 0x19d0
-#define VRP0_DEVID 0x19d1
-#define VRP1_DEVID 0x19d2
-#define ME_HECI1_DEVID 0x19d3
-#define ME_HECI2_DEVID 0x19d4
-#define ME_IEDR_DEVID 0x19ea
-#define ME_MEKT_DEVID 0x19d5
-#define ME_HECI3_DEVID 0x19d6
-#define HSUART_DEVID 0x19d8
-#define HSUART1_DEVID HSUART_DEVID
-#define HSUART2_DEVID HSUART_DEVID
-#define HSUART3_DEVID HSUART_DEVID
-#define IE_HECI1_DEVID 0x19e5
-#define IE_HECI2_DEVID 0x19e6
-#define IE_IEDR_DEVID 0x19e7
-#define IE_MEKT_DEVID 0x19e8
-#define IE_HECI3_DEVID 0x19e9
-#define MMC_DEVID 0x19db
-#define LPC_DEVID 0x19dc
-#define P2SB_DEVID 0x19dd
-#define PMC_DEVID 0x19de
-#define SMBUS_DEVID 0x19df
-#define SPI_DEVID 0x19e0
-#define NPK_DEVID 0x19e1
-
#endif /* _DENVERTON_NS_PCI_DEVS_H_ */
diff --git a/src/soc/intel/denverton_ns/lpc.c b/src/soc/intel/denverton_ns/lpc.c
index 123fb24..6481cbe 100644
--- a/src/soc/intel/denverton_ns/lpc.c
+++ b/src/soc/intel/denverton_ns/lpc.c
@@ -324,7 +324,7 @@
static const struct pci_driver lpc_driver __pci_driver = {
.ops = &device_ops,
.vendor = PCI_VENDOR_ID_INTEL,
- .device = LPC_DEVID,
+ .device = PCI_DEVICE_ID_INTEL_DENVERTON_LPC,
};
static void finalize_chipset(void *unused)
diff --git a/src/soc/intel/denverton_ns/npk.c b/src/soc/intel/denverton_ns/npk.c
index 0404893..631aac7 100644
--- a/src/soc/intel/denverton_ns/npk.c
+++ b/src/soc/intel/denverton_ns/npk.c
@@ -46,5 +46,5 @@
static const struct pci_driver pch_pmc __pci_driver = {
.ops = &pmc_ops,
.vendor = PCI_VENDOR_ID_INTEL,
- .device = NPK_DEVID,
+ .device = PCI_DEVICE_ID_INTEL_DENVERTON_TRACEHUB,
};
diff --git a/src/soc/intel/denverton_ns/pmc.c b/src/soc/intel/denverton_ns/pmc.c
index 8b52087..cbb9a4e 100644
--- a/src/soc/intel/denverton_ns/pmc.c
+++ b/src/soc/intel/denverton_ns/pmc.c
@@ -113,5 +113,5 @@
static const struct pci_driver pch_pmc __pci_driver = {
.ops = &pmc_ops,
.vendor = PCI_VENDOR_ID_INTEL,
- .device = PMC_DEVID,
+ .device = PCI_DEVICE_ID_INTEL_DENVERTON_PMC,
};
diff --git a/src/soc/intel/denverton_ns/sata.c b/src/soc/intel/denverton_ns/sata.c
index ddb8b02..d53d553 100644
--- a/src/soc/intel/denverton_ns/sata.c
+++ b/src/soc/intel/denverton_ns/sata.c
@@ -74,8 +74,8 @@
};
static const unsigned short pci_device_ids[] = {
- AHCI_DEVID, /* DVN SATA AHCI */
- AHCI2_DEVID, /* DVN SATA2 AHCI */
+ PCI_DEVICE_ID_INTEL_DENVERTON_SATA_AHCI_1,
+ PCI_DEVICE_ID_INTEL_DENVERTON_SATA_AHCI_2,
0
};
diff --git a/src/soc/intel/denverton_ns/systemagent.c b/src/soc/intel/denverton_ns/systemagent.c
index 00d5228..50f25c0 100644
--- a/src/soc/intel/denverton_ns/systemagent.c
+++ b/src/soc/intel/denverton_ns/systemagent.c
@@ -345,8 +345,8 @@
/* IDs for System Agent device of Intel Denverton SoC */
static const unsigned short systemagent_ids[] = {
- SA_DEVID, /* DVN System Agent */
- SA_DEVID_DNVAD, /* DVN-AD System Agent */
+ PCI_DEVICE_ID_INTEL_DENVERTON_SA,
+ PCI_DEVICE_ID_INTEL_DENVERTONAD_SA,
0
};
diff --git a/src/soc/intel/denverton_ns/uart.c b/src/soc/intel/denverton_ns/uart.c
index 50f8a29..28e0e2e 100644
--- a/src/soc/intel/denverton_ns/uart.c
+++ b/src/soc/intel/denverton_ns/uart.c
@@ -58,7 +58,7 @@
};
static const unsigned short uart_ids[] = {
- HSUART_DEVID, /* HSUART 0/1/2 */
+ PCI_DEVICE_ID_INTEL_DENVERTON_HSUART,
0
};
diff --git a/src/soc/intel/denverton_ns/xhci.c b/src/soc/intel/denverton_ns/xhci.c
index 0a4b3b1..a0ed6ba 100644
--- a/src/soc/intel/denverton_ns/xhci.c
+++ b/src/soc/intel/denverton_ns/xhci.c
@@ -47,5 +47,5 @@
static const struct pci_driver pch_usb_xhci __pci_driver = {
.ops = &usb_xhci_ops,
.vendor = PCI_VENDOR_ID_INTEL,
- .device = XHCI_DEVID,
+ .device = PCI_DEVICE_ID_INTEL_DENVERTON_XHCI,
};
To view, visit change 37120. To unsubscribe, or for help writing mail filters, visit settings.