[coreboot-gerrit] [XL] Change in coreboot[master]: soc/intel/xeon_sp/spr: Add header files and romstage code

[Johnny Lin (Code Review)]

Attention is currently required from: TimLiu-SMCI, Jonathan Zhang, Johnny Lin, Christian Walter, Angel Pons, Jian-Ming Wang, Arthur Heymans, Srinidhi N Kaushik, Tim Chu.

Johnny Lin has uploaded a new patch set (#5) to the change originally created by Jonathan Zhang. ( https://review.coreboot.org/c/coreboot/+/72442 )

Change subject: soc/intel/xeon_sp/spr: Add header files and romstage code
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soc/intel/xeon_sp/spr: Add header files and romstage code

Change-Id: Ia022534e5206dbeec946d3e5f3c66bcb5628748f
Signed-off-by: Jonathan Zhang 
Signed-off-by: Johnny Lin 
---
A src/soc/intel/xeon_sp/spr/ddr.c
A src/soc/intel/xeon_sp/spr/hob_display.c
A src/soc/intel/xeon_sp/spr/include/soc/cpu.h
A src/soc/intel/xeon_sp/spr/include/soc/crashlog.h
A src/soc/intel/xeon_sp/spr/include/soc/ddr.h
A src/soc/intel/xeon_sp/spr/include/soc/pci_devs.h
A src/soc/intel/xeon_sp/spr/include/soc/soc_util.h
A src/soc/intel/xeon_sp/spr/include/soc/xhci.h
A src/soc/intel/xeon_sp/spr/romstage.c
A src/soc/intel/xeon_sp/spr/soc_util.c
A src/soc/intel/xeon_sp/spr/upd_display.c
11 files changed, 1,401 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/72442/5