Furquan Shaikh uploaded patch set #2 to this change.

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soc/intel/tigerlake: Generate LP4x SPD files using gen_spd.go

This change uses gen_spd.go and global_lp4x_mem_parts.json.txt to
generate SPD files for currently known LP4x memory parts that can be
used with TGL-based mainboards.

Following files are added:
1. spd-*.hex: SPD files auto-generated by gen_spd.go
2. spd_manifest.generated.txt: Manifest file auto-generated by
gen_spd.go

Mainboards can use the SPD files from SoC directly when creating SPD
binary to add to CBFS.

BUG=b:147321551,b:155239397

Change-Id: Ic3935e4f6d106cbdf496fdfa28a0991e2d238fd9
Signed-off-by: Furquan Shaikh <furquan@google.com>
---
A src/soc/intel/tigerlake/spd/lp4x/spd-1.hex
A src/soc/intel/tigerlake/spd/lp4x/spd-2.hex
A src/soc/intel/tigerlake/spd/lp4x/spd-3.hex
A src/soc/intel/tigerlake/spd/lp4x/spd-4.hex
A src/soc/intel/tigerlake/spd/lp4x/spd-5.hex
A src/soc/intel/tigerlake/spd/lp4x/spd-6.hex
A src/soc/intel/tigerlake/spd/lp4x/spd-7.hex
A src/soc/intel/tigerlake/spd/lp4x/spd-8.hex
A src/soc/intel/tigerlake/spd/lp4x/spd_manifest.generated.txt
9 files changed, 265 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/41875/2

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic3935e4f6d106cbdf496fdfa28a0991e2d238fd9
Gerrit-Change-Number: 41875
Gerrit-PatchSet: 2
Gerrit-Owner: Furquan Shaikh <furquan@google.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-CC: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: newpatchset