Nico Huber submitted this change.

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Approvals: build bot (Jenkins): Verified Kyösti Mälkki: Looks good to me, approved Aaron Durbin: Looks good to me, approved Felix Held: Looks good to me, approved Patrick Rudolph: Looks good to me, but someone else must approve
device: Use scan_static_bus() over scan_lpc_bus()

Devices behind LPC can expose more buses (e.g. I2C on a super-i/o).
So we should scan buses on LPC devices, too.

Change-Id: I0eb005e41b9168fffc344ee8e666d43b605a30ba
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/29474
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/device/root_device.c
M src/include/device/device.h
M src/northbridge/via/vx900/lpc.c
M src/northbridge/via/vx900/traf_ctrl.c
M src/soc/amd/common/block/lpc/lpc.c
M src/soc/intel/baytrail/southcluster.c
M src/soc/intel/braswell/southcluster.c
M src/soc/intel/broadwell/lpc.c
M src/soc/intel/common/block/lpc/lpc.c
M src/soc/intel/common/block/pmc/pmc.c
M src/soc/intel/denverton_ns/lpc.c
M src/soc/intel/fsp_baytrail/southcluster.c
M src/soc/intel/fsp_broadwell_de/southcluster.c
M src/soc/intel/quark/lpc.c
M src/southbridge/amd/agesa/hudson/lpc.c
M src/southbridge/amd/amd8111/lpc.c
M src/southbridge/amd/cimx/sb800/late.c
M src/southbridge/amd/cimx/sb900/late.c
M src/southbridge/amd/pi/hudson/lpc.c
M src/southbridge/amd/sb700/lpc.c
M src/southbridge/amd/sb800/lpc.c
M src/southbridge/broadcom/bcm5785/lpc.c
M src/southbridge/intel/bd82x6x/lpc.c
M src/southbridge/intel/fsp_rangeley/lpc.c
M src/southbridge/intel/i82371eb/isa.c
M src/southbridge/intel/i82801dx/lpc.c
M src/southbridge/intel/i82801gx/lpc.c
M src/southbridge/intel/i82801ix/lpc.c
M src/southbridge/intel/i82801jx/lpc.c
M src/southbridge/intel/ibexpeak/lpc.c
M src/southbridge/intel/lynxpoint/lpc.c
M src/southbridge/nvidia/ck804/lpc.c
M src/southbridge/nvidia/mcp55/lpc.c
33 files changed, 31 insertions(+), 41 deletions(-)

diff --git a/src/device/root_device.c b/src/device/root_device.c
index 84d3ba6..6801b41 100644
--- a/src/device/root_device.c
+++ b/src/device/root_device.c
@@ -56,15 +56,6 @@
}
}

-void scan_lpc_bus(struct device *bus)
-{
- printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus));
-
- enable_static_devices(bus);
-
- printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus));
-}
-
void scan_generic_bus(struct device *bus)
{
struct device *child;
diff --git a/src/include/device/device.h b/src/include/device/device.h
index a7ba5a9..405d816e 100644
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -330,7 +330,6 @@
void enable_static_devices(struct device *bus);
void scan_smbus(struct device *bus);
void scan_generic_bus(struct device *bus);
-void scan_lpc_bus(struct device *bus);
void scan_static_bus(struct device *bus);

#endif /* !defined(__ROMCC__) */
diff --git a/src/northbridge/via/vx900/lpc.c b/src/northbridge/via/vx900/lpc.c
index cab783e..fd4d5ad 100644
--- a/src/northbridge/via/vx900/lpc.c
+++ b/src/northbridge/via/vx900/lpc.c
@@ -235,7 +235,7 @@
.set_resources = vx900_lpc_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = vx900_lpc_init,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
};

static const struct pci_driver lpc_driver __pci_driver = {
diff --git a/src/northbridge/via/vx900/traf_ctrl.c b/src/northbridge/via/vx900/traf_ctrl.c
index 8f3f602..2ef542a 100644
--- a/src/northbridge/via/vx900/traf_ctrl.c
+++ b/src/northbridge/via/vx900/traf_ctrl.c
@@ -132,7 +132,7 @@
.init = vx900_traf_ctr_init,
/* Need this here, or the IOAPIC driver won't be called.
* FIXME: Technically not a LPC bus. */
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
};

static const struct pci_driver traf_ctrl_driver __pci_driver = {
diff --git a/src/soc/amd/common/block/lpc/lpc.c b/src/soc/amd/common/block/lpc/lpc.c
index c794601..628273d 100644
--- a/src/soc/amd/common/block/lpc/lpc.c
+++ b/src/soc/amd/common/block/lpc/lpc.c
@@ -330,7 +330,7 @@
.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
.write_acpi_tables = southbridge_write_acpi_tables,
.init = lpc_init,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &lops_pci,
};

diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c
index 8f65433..3c0c07f 100644
--- a/src/soc/intel/baytrail/southcluster.c
+++ b/src/soc/intel/baytrail/southcluster.c
@@ -530,7 +530,7 @@
.enable_resources = NULL,
.init = sc_init,
.enable = southcluster_enable_dev,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &soc_pci_ops,
};

diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index 67e941c..9118f00 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -598,7 +598,7 @@
.write_acpi_tables = southcluster_write_acpi_tables,
.init = sc_init,
.enable = southcluster_enable_dev,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &soc_pci_ops,
};

diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c
index b385d6b..2bebcb8 100644
--- a/src/soc/intel/broadwell/lpc.c
+++ b/src/soc/intel/broadwell/lpc.c
@@ -634,7 +634,7 @@
.acpi_inject_dsdt_generator = southcluster_inject_dsdt,
.write_acpi_tables = broadwell_write_acpi_tables,
.init = &lpc_init,
- .scan_bus = &scan_lpc_bus,
+ .scan_bus = &scan_static_bus,
.ops_pci = &broadwell_pci_ops,
};

diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c
index 46dfd7f..eb7de08 100644
--- a/src/soc/intel/common/block/lpc/lpc.c
+++ b/src/soc/intel/common/block/lpc/lpc.c
@@ -115,7 +115,7 @@
.write_acpi_tables = southbridge_write_acpi_tables,
.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
.init = lpc_soc_init,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &pci_dev_ops_pci,
};

diff --git a/src/soc/intel/common/block/pmc/pmc.c b/src/soc/intel/common/block/pmc/pmc.c
index f6f0983..2b148f2 100644
--- a/src/soc/intel/common/block/pmc/pmc.c
+++ b/src/soc/intel/common/block/pmc/pmc.c
@@ -119,7 +119,7 @@
.enable_resources = pci_dev_enable_resources,
.init = pmc_soc_init,
.ops_pci = &pci_dev_ops_pci,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
};

static const unsigned short pci_device_ids[] = {
diff --git a/src/soc/intel/denverton_ns/lpc.c b/src/soc/intel/denverton_ns/lpc.c
index 5af0781..123fb24 100644
--- a/src/soc/intel/denverton_ns/lpc.c
+++ b/src/soc/intel/denverton_ns/lpc.c
@@ -317,7 +317,7 @@
.enable_resources = lpc_enable_resources,
.init = lpc_init,
.enable = southcluster_enable_dev,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &soc_pci_ops,
};

diff --git a/src/soc/intel/fsp_baytrail/southcluster.c b/src/soc/intel/fsp_baytrail/southcluster.c
index 356b855..a042bb5 100644
--- a/src/soc/intel/fsp_baytrail/southcluster.c
+++ b/src/soc/intel/fsp_baytrail/southcluster.c
@@ -605,7 +605,7 @@
.enable_resources = NULL,
.init = sc_init,
.enable = southcluster_enable_dev,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &soc_pci_ops,
};

diff --git a/src/soc/intel/fsp_broadwell_de/southcluster.c b/src/soc/intel/fsp_broadwell_de/southcluster.c
index 31dcc25..d1981fd 100644
--- a/src/soc/intel/fsp_broadwell_de/southcluster.c
+++ b/src/soc/intel/fsp_broadwell_de/southcluster.c
@@ -294,7 +294,7 @@
.write_acpi_tables = southcluster_write_acpi_tables,
.init = sc_init,
.enable = southcluster_enable_dev,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &soc_pci_ops,
#if CONFIG(HAVE_ACPI_TABLES)
.acpi_name = lpc_acpi_name,
diff --git a/src/soc/intel/quark/lpc.c b/src/soc/intel/quark/lpc.c
index 19f7ceb..df5bdca 100644
--- a/src/soc/intel/quark/lpc.c
+++ b/src/soc/intel/quark/lpc.c
@@ -53,7 +53,7 @@
.read_resources = pmc_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
};

static const struct pci_driver pmc __pci_driver = {
diff --git a/src/southbridge/amd/agesa/hudson/lpc.c b/src/southbridge/amd/agesa/hudson/lpc.c
index 9b18315..4cfbb64 100644
--- a/src/southbridge/amd/agesa/hudson/lpc.c
+++ b/src/southbridge/amd/agesa/hudson/lpc.c
@@ -347,7 +347,7 @@
.write_acpi_tables = acpi_write_hpet,
#endif
.init = lpc_init,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &lops_pci,
.acpi_name = lpc_acpi_name,
};
diff --git a/src/southbridge/amd/amd8111/lpc.c b/src/southbridge/amd/amd8111/lpc.c
index c4a7896..b4a92a0 100644
--- a/src/southbridge/amd/amd8111/lpc.c
+++ b/src/southbridge/amd/amd8111/lpc.c
@@ -164,7 +164,7 @@
.write_acpi_tables = acpi_write_hpet,
.acpi_fill_ssdt_generator = southbridge_acpi_fill_ssdt_generator,
#endif
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.enable = amd8111_enable,
.ops_pci = &lops_pci,
};
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index 1e1cfe0..4233a6f 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -167,7 +167,7 @@
.write_acpi_tables = acpi_write_hpet,
#endif
.init = lpc_init,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &lops_pci,
.acpi_name = lpc_acpi_name,
};
diff --git a/src/southbridge/amd/cimx/sb900/late.c b/src/southbridge/amd/cimx/sb900/late.c
index fc321f8..3a65e33 100644
--- a/src/southbridge/amd/cimx/sb900/late.c
+++ b/src/southbridge/amd/cimx/sb900/late.c
@@ -116,7 +116,7 @@
#if CONFIG(HAVE_ACPI_TABLES)
.write_acpi_tables = acpi_write_hpet,
#endif
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &lops_pci,
};

diff --git a/src/southbridge/amd/pi/hudson/lpc.c b/src/southbridge/amd/pi/hudson/lpc.c
index 02123a1..1e080a0 100644
--- a/src/southbridge/amd/pi/hudson/lpc.c
+++ b/src/southbridge/amd/pi/hudson/lpc.c
@@ -363,7 +363,7 @@
.write_acpi_tables = acpi_write_hpet,
#endif
.init = lpc_init,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &lops_pci,
.acpi_name = lpc_acpi_name,
};
diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c
index eb171e6..5d6d1cd 100644
--- a/src/southbridge/amd/sb700/lpc.c
+++ b/src/southbridge/amd/sb700/lpc.c
@@ -282,7 +282,7 @@
.acpi_fill_ssdt_generator = southbridge_acpi_fill_ssdt_generator,
#endif
.init = lpc_init,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &lops_pci,
};
static const struct pci_driver lpc_driver __pci_driver = {
diff --git a/src/southbridge/amd/sb800/lpc.c b/src/southbridge/amd/sb800/lpc.c
index 580138a..0ca50cc 100644
--- a/src/southbridge/amd/sb800/lpc.c
+++ b/src/southbridge/amd/sb800/lpc.c
@@ -251,7 +251,7 @@
.write_acpi_tables = acpi_write_hpet,
#endif
.init = lpc_init,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &lops_pci,
};
static const struct pci_driver lpc_driver __pci_driver = {
diff --git a/src/southbridge/broadcom/bcm5785/lpc.c b/src/southbridge/broadcom/bcm5785/lpc.c
index 17bc8bc..5ac15e0 100644
--- a/src/southbridge/broadcom/bcm5785/lpc.c
+++ b/src/southbridge/broadcom/bcm5785/lpc.c
@@ -124,7 +124,7 @@
.set_resources = pci_dev_set_resources,
.enable_resources = bcm5785_lpc_enable_resources,
.init = lpc_init,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
// .enable = bcm5785_enable,
.ops_pci = &lops_pci,
};
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index b8df7aa..f67d1e4 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -918,7 +918,7 @@
.init = lpc_init,
.final = lpc_final,
.enable = pch_lpc_enable,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &pci_ops,
};

diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c
index be7913c..d12c379 100644
--- a/src/southbridge/intel/fsp_rangeley/lpc.c
+++ b/src/southbridge/intel/fsp_rangeley/lpc.c
@@ -446,7 +446,7 @@
.write_acpi_tables = acpi_write_hpet,
.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
.enable = soc_lpc_enable,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &pci_ops,
};

diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c
index 00b3866..bb88f7d 100644
--- a/src/southbridge/intel/i82371eb/isa.c
+++ b/src/southbridge/intel/i82371eb/isa.c
@@ -142,7 +142,7 @@
.acpi_fill_ssdt_generator = southbridge_acpi_fill_ssdt_generator,
#endif
.init = isa_init,
- .scan_bus = scan_lpc_bus, /* TODO: Needed? */
+ .scan_bus = scan_static_bus,
.enable = 0,
.ops_pci = 0, /* No subsystem IDs on 82371EB! */
};
diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c
index 2daed4a..031a01a 100644
--- a/src/southbridge/intel/i82801dx/lpc.c
+++ b/src/southbridge/intel/i82801dx/lpc.c
@@ -339,7 +339,7 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = lpc_init,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.enable = i82801dx_enable,
};

diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index 62576c1..670c2f8 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -695,7 +695,7 @@
.acpi_fill_ssdt_generator = southbridge_fill_ssdt,
.acpi_name = lpc_acpi_name,
.init = lpc_init,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.enable = i82801gx_enable,
.ops_pci = &pci_ops,
.final = lpc_final,
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index cb964de..a79ade7 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -543,7 +543,7 @@
.acpi_fill_ssdt_generator = southbridge_fill_ssdt,
.acpi_name = lpc_acpi_name,
.init = lpc_init,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &pci_ops,
};

diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index 6c63186..a395069 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -701,7 +701,7 @@
.acpi_fill_ssdt_generator = southbridge_fill_ssdt,
.acpi_name = lpc_acpi_name,
.init = lpc_init,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &pci_ops,
};

diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index a457722..3657656 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -784,7 +784,7 @@
.init = lpc_init,
.final = lpc_final,
.enable = pch_lpc_enable,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &pci_ops,
};

diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index 28e3544..4b44759 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -981,7 +981,7 @@
.init = lpc_init,
.final = lpc_final,
.enable = pch_lpc_enable,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &pci_ops,
};

diff --git a/src/southbridge/nvidia/ck804/lpc.c b/src/southbridge/nvidia/ck804/lpc.c
index 8caa8ed..63e0de5 100644
--- a/src/southbridge/nvidia/ck804/lpc.c
+++ b/src/southbridge/nvidia/ck804/lpc.c
@@ -314,7 +314,7 @@
.write_acpi_tables = acpi_write_hpet,
#endif
.init = lpc_init,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &ck804_pci_ops,
};

diff --git a/src/southbridge/nvidia/mcp55/lpc.c b/src/southbridge/nvidia/mcp55/lpc.c
index 6416dd3..de2de5c 100644
--- a/src/southbridge/nvidia/mcp55/lpc.c
+++ b/src/southbridge/nvidia/mcp55/lpc.c
@@ -247,7 +247,7 @@
.write_acpi_tables = acpi_write_hpet,
#endif
.init = lpc_init,
- .scan_bus = scan_lpc_bus,
+ .scan_bus = scan_static_bus,
.ops_pci = &mcp55_pci_ops,
};
static const unsigned short lpc_ids[] = {

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I0eb005e41b9168fffc344ee8e666d43b605a30ba
Gerrit-Change-Number: 29474
Gerrit-PatchSet: 11
Gerrit-Owner: Nico Huber <nico.h@gmx.de>
Gerrit-Reviewer: Aaron Durbin <adurbin@chromium.org>
Gerrit-Reviewer: David Guckian <david.guckian@intel.com>
Gerrit-Reviewer: Felix Held <felix-coreboot@felixheld.de>
Gerrit-Reviewer: Huang Jin <huang.jin@intel.com>
Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki@gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h@gmx.de>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Gerrit-Reviewer: Thomas Heijligen <src@posteo.de>
Gerrit-Reviewer: Vanny E <vanessa.f.eusebio@intel.com>
Gerrit-Reviewer: York Yang <yyang024@gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: merged