Arthur Heymans has uploaded this change for review.
[TESTME]soc/intel/braswell: Attempt to skip FSP-T
Use native Cache as ram and make FSP-M not complain by faking FSP-T
has ran.
Change-Id: I15edf479b09bf9a87afb9ab27e09d4360d21b9ff
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/soc/intel/braswell/Kconfig
M src/soc/intel/braswell/Makefile.inc
M src/soc/intel/braswell/bootblock/bootblock.c
3 files changed, 91 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/36263/1
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index 5d6438f..7750534 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -39,7 +39,9 @@
select TSC_MONOTONIC_TIMER
select TSC_SYNC_MFENCE
select UDELAY_TSC
- select USE_GENERIC_FSP_CAR_INC
+# select USE_GENERIC_FSP_CAR_INC
+ select CPU_HAS_L2_ENABLE_MSR
+ select SKIP_FSP_CAR
select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_SPI_CONSOLE_SUPPORT
select HAVE_FSP_GOP
diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc
index cc111da..b50dcb8 100644
--- a/src/soc/intel/braswell/Makefile.inc
+++ b/src/soc/intel/braswell/Makefile.inc
@@ -14,6 +14,8 @@
bootblock-y += lpc_init.c
bootblock-y += pmutil.c
bootblock-y += tsc_freq.c
+bootblock-y += ../../../cpu/intel/car/non-evict/cache_as_ram.S
+bootblock-y += ../../../cpu/x86/early_reset.S
romstage-y += gpio_support.c
romstage-y += iosf.c
@@ -27,6 +29,7 @@
postcar-y += iosf.c
postcar-y += spi.c
postcar-y += tsc_freq.c
+postcar-y += ../../../cpu/intel/car/non-evict/exit_car.S
ramstage-y += acpi.c
ramstage-y += chip.c
diff --git a/src/soc/intel/braswell/bootblock/bootblock.c b/src/soc/intel/braswell/bootblock/bootblock.c
index d8d953c..eb3712e 100644
--- a/src/soc/intel/braswell/bootblock/bootblock.c
+++ b/src/soc/intel/braswell/bootblock/bootblock.c
@@ -27,9 +27,14 @@
#include <soc/lpc.h>
#include <soc/pm.h>
#include <soc/spi.h>
+#include <fsp/util.h>
+#include <cpu/x86/tsc.h>
-asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
+static uint64_t car_timestamp;
+
+asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist)
{
+ car_timestamp = base_timestamp;
/* Call lib/bootblock.c main */
bootblock_main_with_basetime(base_timestamp);
}
@@ -134,6 +139,83 @@
program_base_addresses();
tco_disable();
}
+
+const struct microcode {
+ u32 hdrver; /* Header Version */
+ u32 rev; /* Update Revision */
+ u32 date; /* Date */
+ u32 sig; /* Processor Signature */
+
+ u32 cksum; /* Checksum */
+ u32 ldrver; /* Loader Revision */
+ u32 pf; /* Processor Flags */
+
+ u32 data_size; /* Data Size */
+ u32 total_size; /* Total Size */
+
+ u32 reserved[3];
+ u8 data[10]; /* Our fake microcode */
+} fake_microcode = {
+ .hdrver = 1, /* Header Version */
+ .rev = 1, /* Update Revision */
+ .date = 0x10232019, /* Date: Time of writing 23-10-2019 */
+ .sig = 0x00010ff0, /* Sig: (non existing) Family: 0xf, Model: 0x1f, stepping: 0 */
+
+ .cksum = 0, /* Checksum: not checked by FSP, so won't care */
+ .ldrver = 1, /* Loader Revision */
+ .pf = 1, /* Processor Flags */
+
+ .data_size = 0x10, /* Data Size */
+ .total_size = 0x40, /* Total Size */
+
+ .reserved = {},
+ .data = {},
+};
+
+
+
+
+const FSP_TEMP_RAM_INIT_PARAMS CAR_init_params = {
+ .MicrocodeRegionBase = (uint32_t)&fake_microcode,
+ .MicrocodeRegionLength = sizeof(fake_microcode),
+ .CodeRegionBase = MAX_UINT32 - CONFIG_ROM_SIZE + 1,
+ .CodeRegionLength = CONFIG_ROM_SIZE,
+};
+
+struct fsp_t_handoff {
+ uint32_t bottom_number;
+ tsc_t final_timestamp;
+ tsc_t initial_timestamp;
+ char per0[4];
+ uint32_t middle_number;
+ FSP_TEMP_RAM_INIT_PARAMS fsp_t_params;
+ char mcud[4];
+ uint32_t top_number;
+};
+
+/* FSP-M expects FSP-T to have run, but we didn't do that.
+ Fake that we ran FSP by placing the handoff structure FSP-T
+ normally creates at the top of the CAR region */
+static void install_fsp_t_handoff(void)
+{
+ struct fsp_t_handoff handoff = {
+ .bottom_number = 0,
+ .per0 = "PER0",
+ .mcud = "MCUD",
+ .middle_number = 0x18,
+ .top_number = 0x18,
+ };
+ handoff.initial_timestamp.lo = car_timestamp & UINT32_MAX;
+ handoff.initial_timestamp.hi = (car_timestamp >> 32) & UINT32_MAX;
+ handoff.final_timestamp = rdtsc();
+ handoff.fsp_t_params = (FSP_TEMP_RAM_INIT_PARAMS)CAR_init_params;
+
+ memcpy((void *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_BASE
+ + CONFIG_DCACHE_RAM_MRC_VAR_SIZE
+ - sizeof(struct fsp_t_handoff)),
+ &handoff, sizeof(handoff));
+}
+
void bootblock_soc_init(void)
{
/* Continue chipset initialization */
@@ -142,4 +224,6 @@
spi_init();
lpc_init();
+
+ install_fsp_t_handoff();
}
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