[coreboot-gerrit] Change in coreboot[master]: [WIP,TESTONLY]soc/intel/icelake: Use SSDT generator to generate PCI _...

[Arthur Heymans (Code Review)]

Hello Patrick Rudolph, Subrata Banik, build bot (Jenkins), Patrick Georgi, Martin Roth,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/36437

to look at the new patch set (#3).

Change subject: [WIP,TESTONLY]soc/intel/icelake: Use SSDT generator to generate PCI _PRT table
......................................................................

[WIP,TESTONLY]soc/intel/icelake: Use SSDT generator to generate PCI _PRT table

This creates a _PRT ACPI table using the common southbridge code based
on the default routes the FSP sets up.

TODO: soc/irq.h can be cleaned up and adapted with this code in mind.

The working DSDT version is not removed so that the SSDT version can
be debugged.

Change-Id: I44687e9d18a8fd2c926022fdae1240339df1c978
Signed-off-by: Arthur Heymans 
---
M src/soc/intel/icelake/Kconfig
M src/soc/intel/icelake/Makefile.inc
M src/soc/intel/icelake/chip.c
A src/soc/intel/icelake/pirq.c
4 files changed, 86 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/36437/3