Martin Roth merged this change.

View Change

Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve HAOUAS Elyes: Looks good to me, but someone else must approve Richard Spiegel: Looks good to me, approved Edward O'Callaghan: Looks good to me, approved
soc/amd/picasso: Change SOC_AMD_STONEY* to SOC_AMD_PICASSO

TEST=None
BUG=b:130804851

Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: Ie466bc39ed6aa9d2a8651bd9290090b83cd97d74
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32410
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/soc/amd/picasso/Kconfig
M src/soc/amd/picasso/makefile.inc
2 files changed, 6 insertions(+), 11 deletions(-)

diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index ba82565..5863640 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -13,17 +13,12 @@
## GNU General Public License for more details.
##

-config SOC_AMD_STONEYRIDGE_FP4
+config SOC_AMD_PICASSO
bool
help
- AMD Stoney Ridge FP4 support
+ AMD Picasso support

-config SOC_AMD_STONEYRIDGE_FT4
- bool
- help
- AMD Stoney Ridge FT4 support
-
-if SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4
+if SOC_AMD_PICASSO

config CPU_SPECIFIC_OPTIONS
def_bool y
@@ -386,4 +381,4 @@
return to S0. Otherwise the system will remain in S5 once power
is restored.

-endif # SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4
+endif # SOC_AMD_PICASSO
diff --git a/src/soc/amd/picasso/makefile.inc b/src/soc/amd/picasso/makefile.inc
index 05529d9..f38f8ad 100644
--- a/src/soc/amd/picasso/makefile.inc
+++ b/src/soc/amd/picasso/makefile.inc
@@ -27,7 +27,7 @@
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#*****************************************************************************
-ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y)
+ifeq ($(CONFIG_SOC_AMD_PICASSO),y)

subdirs-y += ../../../cpu/amd/mtrr/
subdirs-y += ../../../cpu/x86/tsc
@@ -300,4 +300,4 @@

endif # ifeq ($(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW),y)

-endif # ($(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y)
+endif # ($(CONFIG_SOC_AMD_PICASSO),y)

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ie466bc39ed6aa9d2a8651bd9290090b83cd97d74
Gerrit-Change-Number: 32410
Gerrit-PatchSet: 3
Gerrit-Owner: Martin Roth <martinroth@google.com>
Gerrit-Reviewer: Edward O'Callaghan <quasisec@chromium.org>
Gerrit-Reviewer: HAOUAS Elyes <ehaouas@noos.fr>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd@gmail.com>
Gerrit-Reviewer: Martin Roth <martinroth@google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-Reviewer: Richard Spiegel <richard.spiegel@silverbackltd.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged