Jason V Le has uploaded this change for review.

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/mainboard/intel/tglrvp/variants/tglrvp_up4 - Enable onboard HDMI and type-C displays for
UP4

- Enable DDC pins for DDI-B
- Enable HPD pins for DDI-1/DDI-2
- Update MPHY/USB2 Mapping to match with the TGL-Y RVP schematic

Test: tested hot-plug/unplug HDMI displays with onboard micro-hdmi connector and type-C connectors to make sure the displays get detected and enabled

Change-Id: I08a1b16a8fa45cf0f366661395b9f2aa25c44935
---
M src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
1 file changed, 14 insertions(+), 7 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/45016/1

diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
index 928ae36..c2c6902 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
@@ -18,13 +18,13 @@
 
 	register "usb2_ports[0]" = "USB2_PORT_MID(OC3)"		# Type-C Port1
 	register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)"	# M.2 WWAN
-	register "usb2_ports[2]" = "USB2_PORT_MID(OC0)"		# M.2 Bluetooth, USB3/2 Type A port1
-	register "usb2_ports[3]" = "USB2_PORT_MID(OC3)"		# USB3/2 Type A port1
+	register "usb2_ports[2]" = "USB2_PORT_MID(OC0)"		# M.2 Bluetooth, USB3/2 Type A Port1
+	register "usb2_ports[3]" = "USB2_PORT_MID(OC3)"		# USB3/2 Type A Port 1
 	register "usb2_ports[4]" = "USB2_PORT_MID(OC3)"		# Type-C Port2
-	register "usb2_ports[5]" = "USB2_PORT_MID(OC3)"		# Type-C Port3
-	register "usb3_ports[6]" = "USB3_PORT_EMPTY"		# Not used
-	register "usb3_ports[7]" = "USB3_PORT_EMPTY"		# Not used
-	register "usb3_ports[8]" = "USB3_PORT_EMPTY"		# Not used
+	register "usb2_ports[5]" = "USB2_PORT_MID(OC3)"		# Type-C Port3 / MECC
+	register "usb2_ports[6]" = "USB2_PORT_EMPTY"		# Not used
+	register "usb2_ports[7]" = "USB2_PORT_EMPTY"		# Not used
+	register "usb2_ports[8]" = "USB2_PORT_EMPTY"		# Not used
 	register "usb2_ports[9]" = "USB2_PORT_MID(OC3)"		# CNVi/BT
 
 	register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)"	# USB3/2 Type A port1
@@ -66,9 +66,16 @@
 	# enabling EDP in PortA
 	register "DdiPortAConfig" = "1"
 
+	register "DdiPortAHpd" = "1"
+	register "DdiPortADdc" = "0"
 	register "DdiPortBHpd" = "1"
+	register "DdiPortBDdc" = "1"
+	register "DdiPortCHpd" = "0"
+	register "DdiPortCDdc" = "0"
 	register "DdiPort1Hpd" = "1"
-	register "DdiPort1Ddc" = "1"
+	register "DdiPort1Ddc" = "0"
+	register "DdiPort2Hpd" = "1"
+	register "DdiPort2Ddc" = "0"
 
 	register "SerialIoI2cMode" = "{
 		[PchSerialIoIndexI2C0]  = PchSerialIoPci,

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