julian.schroeder@amd.com has uploaded this change for review.
mb/google/zork/variants/baseboard: USB2 HS phy settings
Set default USB2 HS disconnect threshold to maximum to avoid false
disconnects that eventually lock up the xHCI controller
BUG=b:174538960
TEST=suspend_stress_test -c 50 on vilboz and morphius.
Sample set of USB2 HS devices connect and disconnect
successfully
Signed-off-by: Julian Schroeder <julian.schroeder@amd.com>
Change-Id: Ic921d850a0bdd717a2a7e50e9e6f65e39e0607bf
---
M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
2 files changed, 12 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/51265/1
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
index c79f362..2b4d73c 100644
--- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
+++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
@@ -58,7 +58,7 @@
# Controller0 Port0 Default
register "usb_2_port_tune_params[0]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@@ -71,7 +71,7 @@
# Controller0 Port1 Default
register "usb_2_port_tune_params[1]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@@ -84,7 +84,7 @@
# Controller0 Port2 Default
register "usb_2_port_tune_params[2]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@@ -97,7 +97,7 @@
# Controller0 Port3 Default
register "usb_2_port_tune_params[3]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@@ -110,7 +110,7 @@
# Controller1 Port0 Default
register "usb_2_port_tune_params[4]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x02,
@@ -123,7 +123,7 @@
# Controller1 Port1 Default
register "usb_2_port_tune_params[5]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x02,
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
index 0e0eb05..3270b6f 100644
--- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
+++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
@@ -58,7 +58,7 @@
# Controller0 Port0 Default
register "usb_2_port_tune_params[0]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@@ -71,7 +71,7 @@
# Controller0 Port1 Default
register "usb_2_port_tune_params[1]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@@ -84,7 +84,7 @@
# Controller0 Port2 Default
register "usb_2_port_tune_params[2]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@@ -97,7 +97,7 @@
# Controller0 Port3 Default
register "usb_2_port_tune_params[3]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@@ -110,7 +110,7 @@
# Controller1 Port0 Default
register "usb_2_port_tune_params[4]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x02,
@@ -123,7 +123,7 @@
# Controller1 Port1 Default
register "usb_2_port_tune_params[5]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x02,
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