Attention is currently required from: Alexander Couzens, Patrick Rudolph.
18 comments:
File src/mainboard/lenovo/g505s/mainboard.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-131794):
Patch Set #2, Line 31: {IOMMU_DEVFN, {PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D} }, /* IOMMU: 0:00.02 - IRQ 3 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-131794):
Patch Set #2, Line 32: {GFX_DEVFN, {PIRQ_A, PIRQ_NC, PIRQ_NC, PIRQ_NC} }, /* APU Integrated Graphics: 0:01.00 - IRQ 3 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-131794):
Patch Set #2, Line 33: {ACTL_DEVFN, {PIRQ_NC, PIRQ_B, PIRQ_NC, PIRQ_NC} }, /* APU HDMI Audio Controller: 0:01.01 - IRQ 4 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-131794):
Patch Set #2, Line 34: {NB_PCIE_PORT1_DEVFN, {PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D} }, /* PCIe GPP to dGPU 1:00.00: 0:02.00 - IRQ 3 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-131794):
Patch Set #2, Line 35: {NB_PCIE_PORT3_DEVFN, {PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D} }, /* PCIe GPP to Eth 2:00.00: 0:04.00 - IRQ 3 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-131794):
Patch Set #2, Line 36: {NB_PCIE_PORT4_DEVFN, {PIRQ_B, PIRQ_C, PIRQ_D, PIRQ_A} }, /* PCIe GPP to WiFi 3:00.00: 0:05.00 - IRQ 4 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-131794):
Patch Set #2, Line 37: {XHCI_DEVFN, {PIRQ_C, PIRQ_NC, PIRQ_NC, PIRQ_NC} }, /* USB XHCI: 0:10.00 - IRQ 5 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-131794):
Patch Set #2, Line 38: {SATA_DEVFN, {PIRQ_SATA, PIRQ_NC, PIRQ_NC, PIRQ_NC} }, /* SATA: 0:11.00 - IRQ 7 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-131794):
Patch Set #2, Line 39: {OHCI1_DEVFN, {PIRQ_OHCI1, PIRQ_NC, PIRQ_NC, PIRQ_NC} }, /* USB OHCI1: 0:12.00 - IRQ 5 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-131794):
Patch Set #2, Line 40: {EHCI1_DEVFN, {PIRQ_NC, PIRQ_EHCI1, PIRQ_NC, PIRQ_NC} }, /* USB EHCI1: 0:12.02 - IRQ 4 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-131794):
Patch Set #2, Line 41: {OHCI2_DEVFN, {PIRQ_OHCI2, PIRQ_NC, PIRQ_NC, PIRQ_NC} }, /* USB OHCI2: 0:13.00 - IRQ 5 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-131794):
Patch Set #2, Line 42: {EHCI2_DEVFN, {PIRQ_NC, PIRQ_EHCI2, PIRQ_NC, PIRQ_NC} }, /* USB EHCI2: 0:13.02 - IRQ 4 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-131794):
Patch Set #2, Line 43: {OHCI3_DEVFN, {PIRQ_OHCI3, PIRQ_NC, PIRQ_NC, PIRQ_NC} }, /* USB OHCI3: 0:16.00 - IRQ 5 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-131794):
Patch Set #2, Line 44: {EHCI3_DEVFN, {PIRQ_NC, PIRQ_EHCI3, PIRQ_NC, PIRQ_NC} }, /* USB EHCI3: 0:16.02 - IRQ 4 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-131794):
Patch Set #2, Line 45: {HDA_DEVFN, {PIRQ_HDA, PIRQ_NC, PIRQ_NC, PIRQ_NC} }, /* Southbridge HD Audio: 0:14.02 - IRQ 3 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-131794):
Patch Set #2, Line 46: {OHCI4_DEVFN, {PIRQ_NC, PIRQ_NC, PIRQ_OHCI4, PIRQ_NC} } /* USB OHCI4: 0:14.05 - IRQ 5 */
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File src/mainboard/lenovo/g505s/mptable.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-131794):
Patch Set #2, Line 132: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), ioapic_id, (pin))
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-131794):
Patch Set #2, Line 202: smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, (intr), (apicid), (pin))
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