Attention is currently required from: Patrick Rudolph, Swift Geek (Sebastian Grzywna).

Angel Pons uploaded patch set #2 to this change.

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[TESTONLY] cpu/intel/socket_BGA956: Increase DCACHE_RAM_SIZE

Change-Id: I3759e3dae5868e033e4b153dba3ad1514e581259
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/cpu/intel/socket_BGA956/Kconfig
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/54002/2

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I3759e3dae5868e033e4b153dba3ad1514e581259
Gerrit-Change-Number: 54002
Gerrit-PatchSet: 2
Gerrit-Owner: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: Swift Geek (Sebastian Grzywna) <swiftgeek@gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-Attention: Patrick Rudolph <siro@das-labor.org>
Gerrit-Attention: Swift Geek (Sebastian Grzywna) <swiftgeek@gmail.com>
Gerrit-MessageType: newpatchset