the following patch was just integrated into master: commit 2b9696239fb3ee6551ae51aa85080206cce9bfed Author: Kumar, Gomathi gomathi.kumar@intel.com Date: Fri Aug 7 16:39:48 2015 +0530
intel/strago: Fix for Crossystem "wpsw_cur" status
The GPIO mapping was incorrect for wpsw_cur. The GPIOs for East community are in two ranges - 0: INT33FF:02 GPIOS [373 - 384] PINS [0 - 11] and 12: INT33FF:02 GPIOS [385 - 396] PINS [15 - 26] The discontinuity was not accounted for, hence the error.Original offset was 0x16 whereas it should be 0x13
TEST=Run crossystem and test wpsw_cur entry. If screw is present, it should be 1 and if not present, it should be 0
Change-Id: I29e19589b3a358a42818afbc6d017d6cbc6a9c4c Original-Signed-off-by: Kumar, Gomathi gomathi.kumar@intel.com Original-Reviewed-on: https://chromium-review.googlesource.com/291572 Original-Reviewed-by: Aaron Durbin adurbin@chromium.org Original-Commit-Queue: Icarus W Sparry icarus.w.sparry@intel.com Reviewed-on: https://review.coreboot.org/13424 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth martinroth@google.com
See https://review.coreboot.org/13424 for details.
-gerrit