Patrick Georgi submitted this change.
mb/siemens/mc_ehl2: Clean up devicetree
There are a bunch of devices in the devicetree that are disabled in
FSP-S and not used on this board. Having them around in the devicetree,
even if disabled, is not necessary and leads to a message in the log
(left over static devices...check your devicetree).
This commit cleans up devicetree.cb and removes all unused and disabled
devices.
Change-Id: I7486f9ba362c80b43b6c888a3b40a4c947218299
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58887
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
1 file changed, 4 insertions(+), 64 deletions(-)
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
index 0ff38d7..67ff3d0 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
@@ -98,11 +98,11 @@
# LPSS Serial IO (I2C/UART/GSPI) related UPDs
register "SerialIoI2cMode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoPci,
- [PchSerialIoIndexI2C1] = PchSerialIoDisabled,
+ [PchSerialIoIndexI2C1] = PchSerialIoPci,
[PchSerialIoIndexI2C2] = PchSerialIoPci,
[PchSerialIoIndexI2C3] = PchSerialIoPci,
[PchSerialIoIndexI2C4] = PchSerialIoPci,
- [PchSerialIoIndexI2C5] = PchSerialIoDisabled,
+ [PchSerialIoIndexI2C5] = PchSerialIoPci,
[PchSerialIoIndexI2C6] = PchSerialIoDisabled,
[PchSerialIoIndexI2C7] = PchSerialIoDisabled,
}"
@@ -110,7 +110,7 @@
register "SerialIoUartMode" = "{
[PchSerialIoIndexUART0] = PchSerialIoPci,
[PchSerialIoIndexUART1] = PchSerialIoPci,
- [PchSerialIoIndexUART2] = PchSerialIoSkipInit,
+ [PchSerialIoIndexUART2] = PchSerialIoPci,
}"
register "SerialIoUartDmaEnable" = "{
@@ -132,38 +132,10 @@
device domain 0 on
device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device
- device pci 04.0 off end # SA Thermal device
- device pci 08.0 off end # GNA
- device pci 09.0 off end # CPU Intel Trace Hub
-
- device pci 10.0 off end # I2C6
- device pci 10.1 off end # I2C7
- device pci 10.5 on end # Integrated Error Handler
-
- device pci 11.0 off end # Intel PSE UART0
- device pci 11.1 off end # Intel PSE UART1
- device pci 11.2 off end # Intel PSE UART2
- device pci 11.3 off end # Intel PSE UART3
- device pci 11.4 off end # Intel PSE UART4
- device pci 11.5 off end # Intel PSE UART5
- device pci 11.6 off end # Intel PSE IS20
- device pci 11.7 off end # Intel PSE IS21
device pci 12.0 on end # GSPI2
- device pci 12.3 on end # Management Engine UMA Access
- device pci 12.4 on end # Management Engine PTT DMA Controller
- device pci 12.5 off end # UFS0
- device pci 12.7 off end # UFS1
-
- device pci 13.0 off end # Intel PSE GSPI0
- device pci 13.1 off end # Intel PSE GSPI1
- device pci 13.2 off end # Intel PSE GSPI2
- device pci 13.3 off end # Intel PSE GSPI3
- device pci 13.4 off end # Intel PSE GPIO0
- device pci 13.5 off end # Intel PSE GPIO1
device pci 14.0 on end # USB3.1 xHCI
- device pci 14.1 off end # USB3.1 xDCI (OTG)
device pci 15.0 on end # I2C0
device pci 15.1 on end # I2C1
@@ -185,36 +157,16 @@
end
device pci 15.3 on end # I2C3
- device pci 16.0 on end # Management Engine Interface 1
- device pci 16.1 on end # Management Engine Interface 2
- device pci 16.4 on end # Management Engine Interface 3
- device pci 16.5 on end # Management Engine Interface 4
+ device pci 16.0 hidden end # Management Engine Interface 1
device pci 17.0 on end # SATA
- device pci 18.0 off end # Intel PSE I2C7
- device pci 18.1 off end # Intel PSE CAN0
- device pci 18.2 off end # Intel PSE CAN1
- device pci 18.3 off end # Intel PSE QEP0
- device pci 18.4 off end # Intel PSE QEP1
- device pci 18.5 off end # Intel PSE QEP2
- device pci 18.6 off end # Intel PSE QEP3
-
device pci 19.0 on end # I2C4
device pci 19.1 on end # I2C5
device pci 19.2 on end # UART2
device pci 1a.0 on end # eMMC
device pci 1a.1 on end # SD
- device pci 1a.3 off end # Intel Safety Island
-
- device pci 1b.0 off end # Intel PSE I2C0
- device pci 1b.1 off end # Intel PSE I2C1
- device pci 1b.2 off end # Intel PSE I2C2
- device pci 1b.3 off end # Intel PSE I2C3
- device pci 1b.4 off end # Intel PSE I2C4
- device pci 1b.5 off end # Intel PSE I2C5
- device pci 1b.6 off end # Intel PSE I2C6
device pci 1c.0 on end # RP1 (pcie0 single VC)
device pci 1c.1 on end # RP2 (pcie0 single VC)
@@ -225,30 +177,18 @@
device pci 1d.0 off end # Intel PSE IPC (local host to PSE)
device pci 1d.1 on end # Intel PSE Time-Sensitive Networking GbE 0
device pci 1d.2 on end # Intel PSE Time-Sensitive Networking GbE 1
- device pci 1d.3 off end # Intel PSE DMA0
- device pci 1d.4 off end # Intel PSE DMA1
- device pci 1d.5 off end # Intel PSE DMA2
- device pci 1d.6 off end # Intel PSE PWM
- device pci 1d.7 off end # Intel PSE ADC
device pci 1e.0 on end # UART0
device pci 1e.1 on end # UART1
- device pci 1e.2 off end # GSPI0
- device pci 1e.3 off end # GSPI1
device pci 1e.4 on end # PCH Time-Sensitive Networking GbE
- device pci 1e.6 on end # HPET
- device pci 1e.7 on end # IOAPIC
device pci 1f.0 on # eSPI Interface
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
end
- device pci 1f.1 on end # P2SB
device pci 1f.2 hidden end # Power Management Controller
- device pci 1f.3 off end # Intel cAVS/HDA
device pci 1f.4 on end # SMBus
device pci 1f.5 on end # PCH SPI (flash & TPM)
- device pci 1f.7 off end # PCH Intel Trace Hub
end
end
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