Patch Set 13:
src/soc/amd/picasso/memlayout_x86.ld will need to be edited as well. I think it can live just before the ASSERTs just below BOOTBLOCK entry.
Hrmm. I just remembered we're statically laying things out so we'll need to double check addresses.
Ehh... Picasso is a whole different can of worms with the whole verstage-before-bootblock thing violating basic assumptions. It doesn't have FMAP_CACHE support yet either, I think? (I saw Martin upload something once but don't remember if it really went through...) I think I wanna focus on getting this to work on the normal boards first, and let the AMD situation fully settle, and then I'll eventually probably have to ask some platform experts for help to see how we can get all this to work on there.
I can fix Asurada for now though.
I can help w/ the right entry in the linker script. Please remind me when you are ready for it.
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